DS1307ZN+T&R/C02 Maxim Integrated Products, DS1307ZN+T&R/C02 Datasheet - Page 7
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DS1307ZN+T&R/C02
Manufacturer Part Number
DS1307ZN+T&R/C02
Description
Real Time Clock 64 x 8 I2C-Compatibl e Real Time Clock I2
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1307Z.pdf
(14 pages)
Specifications of DS1307ZN+T&R/C02
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
OSCILLATOR CIRCUIT
The DS1307 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. Figure 1 shows a
functional schematic of the oscillator circuit. If using a crystal with the specified characteristics, the startup time is
usually less than one second.
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between
the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional
error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the
oscillator circuit may result in the clock running fast. Refer to Application Note 58: Crystal Considerations with
Dallas Real-Time Clocks for detailed information.
Table 1. Crystal Specifications*
*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
Figure 2. Recommended Layout for Crystal
RTC AND RAM ADDRESS MAP
Table 2 shows the address map for the DS1307 RTC and RAM registers. The RTC registers are located in address
locations 00h to 07h. The RAM registers are located in address locations 08h to 3Fh. During a multibyte access,
when the address pointer reaches 3Fh, the end of RAM space, it wraps around to location 00h, the beginning of
the clock space.
Nominal Frequency
Series Resistance
Load Capacitance
NOTE: AVOID ROUTING SIGNAL LINES IN THE CROSSHATCHED
AREA (UPPER LEFT QUADRANT) OF THE PACKAGE UNLESS
THERE IS A GROUND PLANE BETWEEN THE SIGNAL LINE AND THE
DEVICE PACKAGE.
PARAMETER
LOCAL GROUND PLANE (LAYER 2)
CRYSTAL
SYMBOL
ESR
C
f
O
L
GND
X1
X2
MIN
32.768
TYP
12.5
7 of 14
MAX
45
DS1307 64 x 8, Serial, I
UNITS
kHz
kΩ
pF
2
C Real-Time Clock