CY2SSTV857ZXC-32 Silicon Laboratories Inc, CY2SSTV857ZXC-32 Datasheet - Page 4

• Manufacturer Part Number: CY2SSTV857ZXC-32
• Description: Clock Buffer 2.5V 60-200MHz 1:10 Diff DDR266/333 B/D
• Manufacturer: Silicon Laboratories Inc

Specifications of CY2SSTV857ZXC-32

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev 1.0, November 21, 2006
CLK#
CLK
represents a capacitive load
Yx or FBIN
DDR _SDRAM
Yx
Output load capacitance for 2 DDR-SDRAM Loads: 5 pF< CL< 8 pF
CLKIN
120
Ohm
120
Ohm
Figure 2. Propagation Delay Time t
Figure 3. Cycle-to-cycle Jitter
Figure 4. Clock Structure # 1
PLL
FBIN
FBIN#
t
pd
t
C(n)
FBOUT#
FBOUT
= 2.5"
PLH
t
0.3"
C(n+1)
, t
= 0.6" (Split to Terminator)
PHL
SDRAM
SDRAM
DDR -
DDR -
CY2SSTV857-32
VCP
VTR
120
Ohm
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