UDA1380TT NXP Semiconductors, UDA1380TT Datasheet - Page 33

• Manufacturer Part Number: UDA1380TT
• Description: Audio CODECs SSA CODEC
• Manufacturer: NXP Semiconductors

Specifications of UDA1380TT

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-32
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: UDA1380TT/N2,512

Philips Semiconductors
Table 24 Digital data output formats
11.3
11.3.1
Using a 1-bit value, the power control settings of the bias circuits of the ADC, AVC and FSDAC can be set. When this bit
is set to logic 0, the complete bias circuits of the analog front-end and the FSDAC are shut down. In this case, the
reference voltage disappears from the input of the ADCs and LNA and the output of the FSDAC, this can cause plops
but saves power.
Table 25 Register address 02H
Table 26 Description of register bits
2004 Apr 22
Symbol
Default
Symbol
Default
SFORO2
Stereo audio coder-decoder
for MD, CD and MP3
BIT
BIT
12 and 11
0
0
0
0
1
1
1
1
Power control settings
BIT
15
14
13
10
P
9
OWER CONTROL SETTING BIAS CIRCUITS
SFORO1
PON_PLL
EN_AVC
15
0
0
1
1
0
0
1
1
0
0
7
PON_DAC
PON_PLL
SYMBOL
PON_HP
SFORO0
PON_AVC
0
1
0
1
0
1
0
1
14
0
6
0
Power-on WSPLL. When this bit is logic 0: power-off; when this bit is logic 1:
power-on. Default value 0.
default value 0
Power-on headphone driver. A 1-bit value to switch the headphone driver
into power-on or Power-down mode. When this bit is logic 0: headphone driver
is powered-off; when this bit is logic 1: headphone driver is powered-on.
Default value 0.
default value 00
Power-on DAC. A 1-bit value to switch the DAC into power-on or
Power-down mode. In this Power-down mode the V
voltage) will remain on the FSDAC output. When this bit is logic 0: DAC is
powered-off; when this bit is logic 1: DAC is powered-on. Default value 0.
default value 0
PON_HP
13
0
5
0
PON_LNA
12
33
0
4
0
not used: mapped to I
SERIAL_FORMAT_DAO
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
LSB-justified, 24 bits
PON_
PGAL
I
2
11
DESCRIPTION
0
3
0
MSB-justified
S-bus (default)
PON_DAC
PON_
ADCL
10
0
2
0
2
S-bus
REF
(half the power supply
PGAR
PON_
Product specification
9
0
1
0
UDA1380
ADCR
PON_
PON_
BIAS
8
0
0
0