WM8983GEFL/RV Wolfson Microelectronics, WM8983GEFL/RV Datasheet - Page 40

• Manufacturer Part Number: WM8983GEFL/RV
• Description: Audio CODECs Mbl Multimedia CODEC w/ 1W Speaker Driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8983GEFL/RV

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C

WM8983
w
Table 14 ADC Control
SELECTABLE HIGH PASS FILTER
Table 15 ADC Enable Control
Table 16 High Pass Filter Cut-off Frequencies (HPFAPP=1)
The polarity of the output signal can also be changed under software control using the
ADCLPOL/ADCRPOL register bit.
ADCOSR register bit.
operation and when ADCOSR=1 the oversample rate is 128x which gives best performance.
A selectable high pass filter is provided. To disable this filter set HPFEN=0. The filter has two
modes controlled by HPFAPP. In Audio Mode (HPFAPP=0) the filter is first order, with a cut-off
frequency of 3.7Hz. In Application Mode (HPFAPP=1) the filter is second order, with a cut-off
frequency selectable via the HPFCUT register. The cut-off frequencies when HPFAPP=1 are shown
in Table 15.
Note that the High Pass filter values (when HPFAPP=1) are calculated on the assumption that the
SR register bits are set correctly for the actual sample rate as shown in Table 16. Sampling rate
(SR) is enabled by register bits R7[1:3].
HPFCUT
[2:0]
000
001
010
011
100
101
110
111
R14
ADC Control
R14
ADC Control
REGISTER
ADDRESS
REGISTER
ADDRESS
102
131
163
204
261
327
408
82
8
8
7
6:4
SR=101/100
BIT
0
1
3
BIT
11.025
With ADCOSR=0 the oversample rate is 64x which gives lowest power
113
141
180
225
281
360
450
563
ADCLPOL
ADCRPOL
ADCOSR
HPFEN
HPFAPP
HPFCUT
LABEL
LABEL
122
153
156
245
306
392
490
612
12
The oversampling rate of the ADC can be adjusted using the
102
131
163
204
261
327
408
16
82
1
0
000
DEFAULT
SR=011/010
0
0
0
DEFAULT
fs (kHz)
22.05
113
141
180
225
281
360
450
563
High Pass Filter Enable
0 = disabled
1 = enabled
Select audio mode or application mode
0 = Audio mode (1
1 = Application mode (2
HPFCUT)
Application mode cut-off frequency
See Table 16 for details.
122
153
156
245
306
392
490
612
24
ADC left channel polarity adjust:
0 = normal
1 = inverted
ADC right channel polarity adjust:
0 = normal
1 = inverted
0 = 64x (lower power)
1 = 128x (best performance)
ADC oversample rate select:
102
131
163
204
261
327
408
32
82
DESCRIPTION
DESCRIPTION
PD Rev 4.0 November 2006
SR=001/000
44.1
st
113
141
180
225
281
360
450
563
order, fc = ~3.7Hz)
nd
Production Data
order, fc =
122
153
156
245
306
392
490
612
48
40