WM8973LGEFL/V Wolfson Microelectronics, WM8973LGEFL/V Datasheet - Page 38

• Manufacturer Part Number: WM8973LGEFL/V
• Description: Audio CODECs Stereo Codec with H/P Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8973LGEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8973L
w
AUDIO DATA FORMATS
In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 16 Left Justified Audio Interface (assuming n-bit word length)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before a LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 17 Right Justified Audio Interface (assuming n-bit word length)
In I
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 18 I
In DSP mode, the left channel MSB is available on either the 1
edge of BCLK (selectable by LRP) following a rising edge of LRCLK. Right channel data immediately
DACLRC/
DACLRC/
DACLRC/
ADCLRC
ADCLRC
ADCLRC
DACDAT/
DACDAT/
DACDAT/
ADCDAT
ADCDAT
ADCDAT
2
BCLK
BCLK
BCLK
S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.
2
S Justified Audio Interface (assuming n-bit word length)
MSB
1
MSB
1 BCLK
2
1
3
2
Input Word Length (WL)
MSB
1
3
Input Word Length (WL)
LEFT CHANNEL
LEFT CHANNEL
LEFT CHANNEL
2
3
Input Word Length (WL)
n-2 n-1
n-2 n-1
LSB
n
LSB
n-2 n-1
n
LSB
n
MSB
Note: Input word length is defined by the WL register.
1/fs
1/fs
1/fs
1
Note: Input word length is defined by the WL register.
MSB
1 BCLK
2
1
Timing is shown with LRP = 1
3
2
Note: Input word length is defined by the WL register.
Timing is shown with LRP = 1
MSB
1
3
st
RIGHT CHANNEL
RIGHT CHANNEL
RIGHT CHANNEL
2
(mode B) or 2
Timing is shown with LRP = 1
3
n-2 n-1
n-2 n-1
Advanced Information
AI Rev 3.2 July 2004
n
LSB
nd
n-2 n-1
n
LSB
(mode A) rising
LSB
n
38