WM8903LGEFK/V Wolfson Microelectronics, WM8903LGEFK/V Datasheet - Page 89

• Manufacturer Part Number: WM8903LGEFK/V
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pre-Production
w
CLOCKING REGISTERS
The WM8903 clocking is configured using the register bits defined in Table 61.
Table 61 Clocking Control
R20 (14h)
Clock Rates 0
R21 (15h)
Clock Rates 1
R22 (16h)
Clock Rates 2
REGISTER
ADDRESS
13:10
BIT
9:8
3:0
0
2
1
0
MCLKDIV2
CLK_SYS_RAT
E [3:0]
CLK_SYS_MOD
E [1:0]
SAMPLE_RATE
[3:0]
CLK_SYS_ENA
CLK_DSP_ENA
TO_ENA
LABEL
DEFAULT
0011
1000
00
0
0
0
0
Enables divide by 2 on MCLK
0 = CLK_SYS = MCLK
1 = CLK_SYS = MCLK / 2
CLK_SYS_RATE and
CLK_SYS_MODE together
determine the clock division ratio
(CLK_SYS / fs); see Table 62
Selects the Sample Rate (fs)
0000 = 8kHz
0001 = 11.025kHz
0010 = 12kHz
0011 = 16kHz
0100 = 22.05kHz
0101 = 24kHz
0110 = 32kHz
0111 = 44.1kHz
1000 = 48kHz
1001 = 88.2kHz (Not available for
Digital Microphone. Not used for
88.2kHz ADC.)
1010 = 96kHz (Not available for
Digital Microphone. Not used for
96kHz ADC)
1011 to 1111 = Reserved
If the desired sample rate is not
listed in this table, then the closest
alternative should be chosen.
System Clock enable
0 = Disabled
1 = Enabled
DSP Clock enable
0 = Disabled
1 = Enabled
Zero Cross timeout enable
0 = Disabled
1 = Enabled
PP, Rev 3.1, August 2009
DESCRIPTION
WM8903
89