WM8903LGEFK/V Wolfson Microelectronics, WM8903LGEFK/V Datasheet - Page 79

• Manufacturer Part Number: WM8903LGEFK/V
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pre-Production
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In Right Justified mode, the LSB is available on the last rising edge of BCLK before a LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 39 Right Justified Audio Interface (assuming n-bit word length)
In I
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 40 I
In DSP/PCM mode, the left channel MSB is available on either the 1
rising edge of BCLK (selected by AIF_LRCLK_INV) following a rising edge of LRC. Right channel
data immediately follows left channel data. Depending on word length, BCLK frequency and sample
rate, there may be unused BCLK cycles between the LSB of the right channel data and the next
sample.
In device master mode, the LRC output resembles the frame pulse shown in Figure 41 and Figure
42. In device slave mode, Figure 43 and Figure 44, it is possible to use any length of frame pulse
less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period
before the rising edge of the next frame pulse.
2
S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.
2
S Justified Audio Interface (assuming n-bit word length)
st
PP, Rev 3.1, August 2009
(mode B) or 2
WM8903
nd
(mode A)
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