LTC4260CSW#TR Linear Technology, LTC4260CSW#TR Datasheet - Page 7

• Manufacturer Part Number: LTC4260CSW#TR
• Description: MS-Hot Swap/High Voltage, 48V Hot Swap Controller With I2C ADC
• Manufacturer: Linear Technology

Specifications of LTC4260CSW#TR

• Family Name: LTC4260
• Package Type: SOIC W
• Operating Supply Voltage (min): 8.5V
• Operating Supply Voltage (max): 80V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / Rohs Status: Not Compliant

PI FU CTIO S
ADIN: ADC Input. A voltage between 0V and 2.56V applied
to this pin can be measured by the onboard ADC. Tie to
ground if unused.
ADR0 to ADR2: Serial Bus Address Inputs. Tying these
pins to ground, open or INTV
sible addresses. See Table 1 in Applications Information.
ALERT: Fault Alert Output. Open-drain logic output that
can be pulled to ground when a fault occurs to alert the
host controller. A fault alert is enabled by the ALERT
register. This device is compatible with SMBus alert
protocol. See Applications Information. Tie to ground if
unused.
BD_PRST: Board Present Input. Ground this pin to enable
the N-channel FET to turn on after 100ms debounce delay.
When this pin is high, the FET is off. An internal 10µA
current source pulls up this pin. Transitions on this pin will
be recorded in the FAULT register. A high-to-low transition
activates the logic to read the state of the ON pin and clear
Faults. See Applications Information.
TYPICAL PERFOR A CE CHARACTERISTICS
–1
–2
U
2
1
0
–50
ADC Full-Scale Error
vs Temperature (ADIN Pin)
–25
U
TEMPERATURE (°C)
0
25
U
50
W
CC
75
3708 G15
configures one of 27 pos-
U
100
–0.25
–0.50
0.50
0.25
0
0
ADC INL vs Code (ADIN Pin)
64
CODE
128
Exposed Pad (Pin 33, UH Package): Exposed Pad may be
left open or connected to device ground.
FB: Foldback and Power Good Input. A resistive divider
from the output voltage is tied to this pin. When the voltage
at this pin drops below 3.41V, the output power is consid-
ered bad and the current limit is reduced. The power bad
condition can be indicated with the GPIO pin and a power
bad fault can be logged in this condition. See Applications
Information.
GATE: Gate Drive for External N-Channel FET. An internal
18µA current source charges the gate of the external
N-channel MOSFET. A resistor and capacitor network
from this pin to ground sets the turn-on rate and compen-
sates the active current limit. During turn-off there is a
1mA pull-down current. During a short circuit or under-
voltage lockout (V
current source between GATE and SOURCE is activated.
GND: Device Ground.
192
4260 G16
T
A
256
= 25°C, V
DD
–0.25
–0.50
0.50
DD
0.25
or INTV
0
= 48V unless otherwise noted.
0
ADC DNL vs Code (ADIN Pin)
CC
64
), a 600mA pull-down
CODE
128
LTC4260
192
4260 G17
4260fa
7
256