LTC4253ACUF-ADJ#TR Linear Technology, LTC4253ACUF-ADJ#TR Datasheet - Page 30

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LTC4253ACUF-ADJ#TR

Manufacturer Part Number
LTC4253ACUF-ADJ#TR
Description
IC,Power Control/Management,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4253ACUF-ADJ#TR

Family Name
LTC4253A-ADJ
Package Type
QFN EP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Product Depth (mm)
4mm
Product Length (mm)
4mm
Mounting
Surface Mount
Pin Count
20
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC4253ACUF-ADJ#TRLTC4253ACUF-ADJ#PBF
Manufacturer:
LT
Quantity:
3 000
APPLICATIO S I FOR ATIO
LTC4253A-ADJ
reflected in V
zero. V
when V
time point 6. SEL tied low chooses this SS servo mode
during soft-start while SEL set high allows the SS pin to do
an open-loop ramp-up as in Figures 15a and 15b. The
stability of the SS servo loop requires a C
Large values of C
time-out as V
tial during the circuit breaker delay. The load capacitor is
unable to achieve full charge in one GATE start-up cycle.
A more serious side effect of a large C
duration may be exceeded during soft-start into a low
impedance load. A soft-start voltage below V
activate the circuit breaker TIMER.
Power Limit Circuit Breaker
Figure 16 shows the LTC4253A-ADJ in a power limit
circuit breaking application. The SENSE pin is modulated
by board voltage V
set to be the same as the lowest operating voltage,
V
operating voltage, V
power as available at V
30
SUPPLY(MIN)
– 48V RTN
(LONG PIN)
RESET
(LONG PIN)
– 48V RTN
(SHORT PIN)
– 48V
(LONG PIN)
SENSE
ACL
2.05k
20k
1%
1%
(t) already has a substantial offset from zero at
R2
R1
does not show a large kink as in Figure 15b
ACL
SENSE
= 43V. If the goal is to have the high supply
2k
1%
255k
1%
(t) may marginally exceed the V
SS
SUPPLY
C1
10nF
R3
) that ramps up smoothly from near
U
can cause premature circuit breaker
0.1µF
C
SUPPLY(MAX)
C
SQ
SS
SUPPLY(MIN)
33nF
. The zener voltage, V
U
C
0.68µF
T
UVL
UV
OVL
OV
SS
SQTIMER
TIMER
20k(1/4W)/2
RESET
LTC4253A-ADJ
SEL
10k
R
IN
PWRGD1
PWRGD2
PWRGD3
, then resistors R4 and
= 71V give the same
V
V
SENSE
DRAIN
IN
EE
W
GATE
BZV85C43
EN3
EN2
SS
Figure 16. Power Limit Circuit Breaker Application
value is that SOA
31.6k
D1
R4
SS
1µF
> 5nF.
C
22Ω
IN
R5
R9 22k
CB
Z
U
CB
of D1, is
will not
10nF
poten-
C
C
R
Q2
FZT857
D
R6
2.2k
1M
R
10Ω
C
Q1
IRF530S
R
0.02Ω
R5 are selected by:
If R5 is 22Ω, then R4 is 31.6k. The peak circuit breaker
power limit is:
when V
The peak power at the fault current limit occurs at the
supply overvoltage threshold. The fault current limited
power is:
POWER MAX
S
R7
2.2k
POWER FAULT
R
R
(
EN2
V
5
4
V
SUPPLY
IN1
=
R
SUPPLY
V
(
S
IN1
V
SUPPLY MAX
(
R8
2.2k
)
100µF
)
V
= 0.5 • (V
= 57V
C2
CB
=
=
V
+
POWER AT V
(
1 064
(
4
ACL
V
.
)
0.1µF
SUPPLY MIN
=
C3
POWER
MODULE 1
OUTPUT
V
)
SUPPLY MIN
(
SUPPLY(MIN)
POWER AT V
V
SUPPLY
MODULE 1
EN
(
POWER
EN3
(
SUPPLY MIN
)
+
)
V
SUPPLY MAX
V
V
V
+ V
MOC207
IN1
Z
SUPPLY MAX
(
SUPPLY MIN
) •
EN
MODULE 2
SUPPLY(MAX)
MODULE 2
POWER
OUTPUT
POWER
R
R
)
(
5
4
4253A F16
(
(
)
)
EN
2
)
4253a-adjf
)
LOAD 3
(17)
(18)
)
(19)

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