LTC4253ACUF-ADJ#TR Linear Technology, LTC4253ACUF-ADJ#TR Datasheet - Page 25

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LTC4253ACUF-ADJ#TR

Manufacturer Part Number
LTC4253ACUF-ADJ#TR
Description
IC,Power Control/Management,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4253ACUF-ADJ#TR

Family Name
LTC4253A-ADJ
Package Type
QFN EP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Product Depth (mm)
4mm
Product Length (mm)
4mm
Mounting
Surface Mount
Pin Count
20
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC4253ACUF-ADJ#TRLTC4253ACUF-ADJ#PBF
Manufacturer:
LT
Quantity:
3 000
APPLICATIO S I FOR ATIO
V
V
timing behavior as the UV pin timing except it looks at V
< (V
undervoltage lockout condition, both UV and OV com-
parators are held off. When V
the UV and OV comparators are enabled.
IN
IN
undervoltage lockout comparator, UVLO has a similar
Undervoltage Lockout Timing
LKO
SQTIMER
– V
PWRGD1
PWRGD2
PWRGD3
SENSE
TIMER
DRAIN
GATE
LKH
UVL
EN2
EN3
UV
SS
) to shut down and V
UVL DROPS BELOW V
1
U
V
V
UVLO
GATEL
U
UV CLEARS V
2
Figure 10. Undervoltage Timing (All Waveforms are Referenced to V
IN
V
UVHI
exits undervotlage lockout,
UVLO
UVHI
IN
. GATE, SS AND TIMER ARE PULLED DOWN, PWRGD RELEASES
W
> V
5µA
INITIAL TIMING
, CHECK OV CONDITION, RESET < 0.8V, GATE < V
LKO
50µA
to start. In an
20 • (V
20 • (V
U
V
ACL
TMRH
CB
20 • V
V
+ V
+ V
TMRL
OS
OS
IN
OS
)
)
50µA
3 4 56
TIMER CLEARS V
200µA + 8 • I
Overvoltage Timing
During normal operation, if the OV pin exceeds V
shown at time point 1 of Figure 11, the TIMER and PWRGD
status are unaffected; SS and GATE pull down; load
disconnects. At time point 2, OVL recovers and drops
below the V
overvoltage glitch is long enough to deplete the load
capacitor, time points 4 through 7 may occur.
START-UP
GATE
7
50µA
8 9 A B
DRN
GATEL
TMRL
V
SQTMRH
5µA
, SENSE < V
OVLO
, CHECK GATE < V
V
V
V
V
V
IN
ACL
CB
DRNCL
DRNL
– V
5µA
GATEH
threshold; GATE start-up begins. If the
C
CB
5µA
, SS < 20 • V
GATEL
D
LTC4253A-ADJ
EE
, SENSE < V
OS
)
AND TIMER < V
E
5µA
V
CB
SQTMRL
AND SS < 20 • V
4253 F10
TMRL
OS
25
OVHI
4253a-adjf
as

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