LT1952IGN Linear Technology, LT1952IGN Datasheet - Page 16

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LT1952IGN

Manufacturer Part Number
LT1952IGN
Description
IC,SMPS CONTROLLER,CURRENT-MODE,SOP,16PIN,PLASTIC
Manufacturer
Linear Technology
Datasheets

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APPLICATIO S I FOR ATIO
LT1952
Example calculation for (2)
Note 1: To achieve the same maximum duty cycle clamp
at 100kHz as calculated for 200kHz, the SS_MAXDC
voltage should be reprogrammed by,
The second order effect of t
ered for final adjustment of SS_MAXDC(DC).
Note 2 : To achieve the same maximum duty cycle clamp
while synchronizing to an external clock at the SYNC pin,
the SS_MAXDC voltage should be re-programmed as,
Programming Soft-Start Timing
The LT1952 has built-in soft-start capability to provide low
stress controlled startup from a list of fault conditions that
can occur in the application (see Figure 1 and Figure 10).
The LT1952 provides true PWM soft-start by using the
SS_MAXDC pin to control soft-start timing. The propor-
tional relationship between SS_MAXDC voltage and switch
maximum duty cycle clamp allows the SS_MAXDC pin to
slowly ramp output voltage by ramping the maximum
switch duty cycle clamp — until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
16
R
this gives SS_MAXDC(DC) = 1.84V, t
and k = 1
Maximum Duty Cycle Clamp
= 1 • 0.522(1.84/1.32) – (40ns • 200kHz)
= 0.728 – 0.008 = 0.72 (Duty Cycle Clamp = 72%)
SS_MAXDC(DC) (100kHz)
= SS_MAXDC(DC) (200kHz) • k (200kHz)/k (100kHz)
= 1.84 • 1.0/1.055 = 1.74V (k = 1.055 for 100kHz)
SS_MAXDC (DC) (fsync)
= SS_MAXDC (DC) (200kHz) • [(fosc/fsync) +
0.09(fosc/200kHz)
For SS_MAXDC (DC) (200kHz) = 1.84V for 72%
duty cycle
SS_MAXDC (DC) (fsync = 250kHz) for 72%
duty cycle
= 1.84 • [(200kHz/250kHz) + 0.09(1)
= 1.638V
For R
DELAY
T
= 35.7k, R
= 40k, f
OSC
U
B
0.6
= 100k, V
= 200kHz and SD_V
]
U
DELAY
REF
should also be consid-
W
= 2.5V,
0.6
DELAY
]
SEC
= 40ns
= 1.32V,
U
A capacitor C
divider from V
cycle clamp, determine soft-start timing (Figure 11).
A soft-start event is triggered for the following faults:
(1) V
(2) SD_V
(3) OC > 100mV (over-current condition)
When a soft-start event is triggered, switching at SOUT
and OUT is stopped immediately. A soft-start latch is set
and SS_MAXDC pin is discharged. The SS_MAXDC pin
can only recharge when the soft-start latch has been reset.
Note: A soft-start event caused by (1) or (2) above, also
causes V
SS_MAXDC
SS_MAXDC
C
IN
SS
SOFT-START
EVENT TRIGGERED
< 8.75V, or
REF
SEC
Figure 11. Programming Soft-Start Timing
R
B
R
to be disabled and to fall to ground.
T
< 1.32V (UVLO), or
SS
REF
SS_MAXDC CHARGING MODEL
SS_MAXDC(DC) = V
R
Figure 10. Soft-Start Timing
SS_MAXDC
V
CHARGE
on the SS_MAXDC pin and the resistor
REF
used to program maximum switch duty
LT1952
= [R
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
T
• R
B
SS_MAXDC(DC)
/(R
REF
T
[R
+ R
B
/(R
B
)]
R
CHARGE
T
+ R
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
B
)]
C
SS
SS_MAXDC
LT1952
1952 F10
1952 F11
1952f

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