KSZ8893MQL AM Micrel Inc, KSZ8893MQL AM Datasheet - Page 95

• Manufacturer Part Number: KSZ8893MQL AM
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, 128-Ld PQFP( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893MQL AM

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3091

Dynamic MAC Address Table
The KSZ8893MQL/MBL maintains the dynamic MAC address table. Read access is allowed only.
December 2007
Bit
71
70-67
66
65-56
55-54
53-52
51-48
47-0
Example:
Dynamic MAC Address Table Read (read the 1
Then,
Write to reg. 129 (0x81), VLAN table bits [19:16]
Write to reg. 130 (0x82), VLAN table bits [15:8]
Write to reg. 131 (0x83), VLAN table bits [7:0]
Write to reg. 121 (0x79) with 0x04
Write to reg. 122 (0x7A) with 0x06
Write to reg. 121 (0x79) with 0x18
Write to reg. 122 (0x7A) with 0x00
Read reg. 123 (0x7B), bit [7]
Read reg. 124 (0x7C), dynamic table bits [63:56]
Read reg. 125 (0x7D), dynamic table bits [55:48]
Read reg. 126 (0x7E), dynamic table bits [47:40]
Read reg. 127 (0x7F), dynamic table bits [39:32]
Read reg. 128 (0x80), dynamic table bits [31:24]
Read reg. 129 (0x81), dynamic table bits [23:16]
Read reg. 130 (0x82), dynamic table bits [15:8]
Read reg. 131 (0x83), dynamic table bits [7:0]
Name
Data Not
Ready
Reserved
MAC Empty
No of Valid
Entries
Time Stamp
Source Port
FID
MAC Address
Table 18. Format of Dynamic MAC Address Table (1K Entries)
R/W
RO
RO
RO
RO
RO
RO
RO
RO
dynamic table bits [66:64]
Description
= 1, entry is not ready, continue retrying until this
bit is set to 0
= 0, entry is ready
Reserved
= 1, there is no valid entry in the table
= 0, there are valid entries in the table
Indicates how many valid entries in the table
2 bits counter for internal aging
The source port where FID+MAC is learned
Filter ID
48-bit MAC Address
0x3ff means 1K entries
0x001 means 2 entries
0x000 and bit 66 = 0 means 1 entry
0x000 and bit 66 = 1 means 0 entry
00 : port 1
01 : port 2
10 : port 3
95
st
entry and retrieve the MAC table size)
// Write VLAN table selected
// Trigger the write operation
// Read dynamic table selected
// Trigger the read operation
// if bit 7 = 1, restart (reread) from this register
Default
1
00_0000_0000
00
0x0
0x0000_0000_0000
M9999-121007-1.5