KSZ8842-PMQLI Micrel Inc, KSZ8842-PMQLI Datasheet - Page 64
![2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface, Ind Temp ( )](/photos/6/81/68152/576-128-pqfp_sml.jpg)
KSZ8842-PMQLI
Manufacturer Part Number
KSZ8842-PMQLI
Description
2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface, Ind Temp ( )
Manufacturer
Micrel Inc
Specifications of KSZ8842-PMQLI
Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Package Type
PQFP
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1636 - BOARD EVALUATION KSZ8842-PMQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-2121
KSZ8842-PMQLI
KSZ8842-PMQLI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8842-PMQLI
Manufacturer:
TI
Quantity:
3 100
Micrel, Inc.
Indirect Access Control Register (Offset 0x04A0): IACR
This register contains the indirect control for the switch function.
Indirect Access Data Register 1 (Offset 0x04A2): IADR1
This register contains the indirect data for the switch function.
Indirect Access Data Register 2 (Offset 0x04A4): IADR2
This register contains the indirect data for the switch function.
Indirect Access Data Register 3 (Offset 0x04A6): IADR3
This register contains the indirect data for the switch function.
Indirect Access Data Register 4 (Offset 0x04A8): IADR4
This register contains the indirect data for the switch function.
October 2007
Note: (1) write IACR will actually trigger a command.
Read or write access is determined by Register bit 12.
15 – 13
15 – 8
15 – 0
15 – 0
15 – 0
11:10
9 – 0
6 – 3
2 – 0
Bit
Bit
Bit
Bit
Bit
12
7
Default
Default
Default
Default
Default
0x0000
0x0000
0x0000
0x000
0x000
000
0x0
000
00
0
0
R/W
R/W
R/W
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
Description
Reserved
Read High. Write Low
1 = read cycle
0 = write cycle
Table select
00 = static MAC address table selected
01 = VLAN table selected
10 = dynamic address table selected
11 = MIB counter selected
Indirect address
Bit 9-0 of indirect address
Description
Reserved
CPU Read Status
Only for dynamic and statistics counter reads.
1 = read is still in progress
0 = read has completed
Reserved
Indirect data.
Bit 66-64 of indirect data
Description
Indirect data
Bit 47-32 of indirect data
Description
Indirect data
Bit 63-48 of indirect data
Description
Indirect data
Bit 15-0 of indirect data
64
KSZ8842-PMQL/PMBL
M9999-100207-1.5