KSZ8841-32MVL Micrel Inc, KSZ8841-32MVL Datasheet - Page 59

Single Ethernet Port + Generic (32-bit) Bus Interface( )

KSZ8841-32MVL

Manufacturer Part Number
KSZ8841-32MVL
Description
Single Ethernet Port + Generic (32-bit) Bus Interface( )
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8841-32MVL

Controller Type
Ethernet Controller, MAC
Interface
Bus
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1632 - BOARD EVALUATION KSZ8841-16MVL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-2116
KSZ8841-32MVL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8841-32MVL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8841-32MVLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Bank 4 Wakeup Frame 0 Byte Mask 3 Register (0x0A): WF0BM3
This register contains the last 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 0. Setting bit 15 selects the 64th byte of the Wake up frame 0.
Bank 5 Wakeup Frame 1 CRC0 Register (0x00): WF1CRC0
This register contains the expected CRC values of the Wake up frame 1 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard; it is taken over the bytes specified in
the wake up byte mask registers.
Bank 5 Wakeup Frame 1 CRC1 Register (0x02): WF1CRC1
This register contains the expected CRC values of the Wake up frame 1 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bank 5 Wakeup Frame 1 Byte Mask 0 Register (0x04): WF1BM0
This register contains the first 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the first byte
of the Wake up frame 1, setting bit 15 selects the 16th byte of the Wake up frame 1.
Bank 5 Wakeup Frame 1 Byte Mask 1 Register (0x06): WF1BM1
This register contains the next 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 1. Setting bit 15 selects the 32nd byte of the Wake up frame 1.
October 2007
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF0BM3
Wake-up Frame 0 Byte Mask 3.
The last 16 bytes mask covering bytes 49 to 64 of a Wake-up frame 0 pattern.
Description
WF1CRC0
Wake-up frame 1 CRC (lower 16 bits).
The expected CRC value of a Wake-up frame 1 pattern.
Description
WF1CRC1
Wake-up frame 1 CRC (upper 16 bits).
The expected CRC value of a Wake-up frame 1 pattern.
Description
WF1BM0
Wake-up frame 1 Byte Mask 0.
The first 16 bytes mask of a Wake-up frame 1 pattern.
Description
WF1BM1
Wake-up frame 1 Byte Mask 1.
The next 16 bytes mask covering bytes 17 to 32 of a Wake-up frame 1 pattern.
59
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6

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