EVAL-AD7291SDZ Analog Devices Inc, EVAL-AD7291SDZ Datasheet - Page 5

• Manufacturer Part Number: EVAL-AD7291SDZ
• Description: Evaluation Control Board
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of EVAL-AD7291SDZ

• Rohs Compliant: YES
• Silicon Manufacturer: Analog Devices
• Kit Application Type: Interface
• Application Sub Type: ADC
• Features: Channel Sequencer Operation, Alert Function, Autocycle Mode
• Number Of Adc's: 8
• Number Of Bits: 12
• Sampling Rate (per Second): 22.22k
• Data Interface: I²C
• Input Range: -
• Power (typ) @ Conditions: -
• Operating Temperature: -
• Utilized Ic / Part: AD7291
• Silicon Core Number: AD7291
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

I
Guaranteed by initial characterization. All values were measured with the input filtering enabled. C
bus line, with t
2.5 V internal/external; T
Table 3.
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1
SCL
2
1
2
3
4
5
6
7
8
9
10
11
11A
12
SP
POWER-UP
A device must provide a data hold time for SDA to bridge the undefined region of the SCL falling edge.
1
C TIMING SPECIFICATIONS
SCL
SDA
S = START CONDITION
P = STOP CONDITION
R
Conditions
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Standard mode
Fast mode
Fast mode
P
and t
t
7
S
F
measured between 0.3 × V
t
6
A
= −40°C to +125°C, unless otherwise noted.
t
2
t
11
t
4
Min
4
0.6
4.7
1.3
250
100
0
0
4.7
0.6
4
0.6
4.7
1.3
4
0.6
20 + 0.1 C
20 + 0.1 C
20 + 0.1 C
20 + 0.1 C
20 + 0.1 C
0
Figure 2. 2-Wire Serial Interface Timing Diagram
DRIVE
Limit at T
and 0.7 × V
B
B
B
B
B
t
1
t
12
Typ
t
MIN
3
Rev. 0 | Page 5 of 28
, T
MAX
DRIVE
Max
100
400
3.45
0.9
1000
300
300
300
1000
300
1000
300
300
300
50
6
(see Figure 2). V
Unit
kHz
kHz
μs
μs
μs
μs
ns
ns
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
S
t
5
t
10
Description
Serial clock frequency
t
t
t
t
t
t
t
t
t
t
t
t
start condition and after an acknowledge bit
t
Pulse width of the suppressed spike
Power-up and acquisition time
HIGH
LOW
SU;DAT
HD;DAT
SU;STA
HD;STA
BUF
SU;STO
RDA
FDA
RCL
RCL1
FCL
DD
t
6
, fall time of the SCL signal
, rise time of the SCL signal
, bus-free time between a stop and a start condition
, fall time of the SDA signal
, rise time of the SDA signal
, SCL low time
, SCL high time
, rise time of the SCL signal after a repeated
= 2.8 V to 3.6 V; V
, setup time for a repeated start condition
, data setup time
, hold time for a repeated start condition
, setup time for a stop condition
, data hold time
B
refers to the capacitive load on the
DRIVE
= 1.65 V to 3.6 V; V
t
8
P
AD7291
t
9
REF
=