EVAL-AD5382EBZ Analog Devices Inc, EVAL-AD5382EBZ Datasheet - Page 3

• Manufacturer Part Number: EVAL-AD5382EBZ
• Description: Evaluation Board I.c.
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5382EBZ

• Number Of Dac's: 32
• Number Of Bits: 14
• Outputs And Type: 32, Single Ended
• Sampling Rate (per Second): 125k
• Data Interface: DSP, I²C, MICROWIRE™, Parallel, QSPI™, SPI™
• Settling Time: 8µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5382
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4391457

LINK AND SWITCH OPTIONS
The link and switch options on the evaluation board should be set for the required operating setup before using the board. The functions
of the link and switch options are described in Table 1.
Table 1. Link Options
Link/Switch No.
LK1
LK2
LK3
LK4
S1
S2
S3
S4
S5
S6
Function
For normal operation, this link should be in the off position.
When this link is in the on position, it connects the RESET pin to DGND, resetting the AD538x.
For normal operation, this link should be in the off position.
When this link is in the on position, it connects the CLR pin to DGND, clearing the outputs of the AD538x to the user-
programmed value.
This link selects the state of the LDAC pin.
In the on position, LDAC is connected to DGND and, therefore, the DACs update automatically.
In the off position, LDAC is connected to DV
This link selects the reference.
Position A selects the externally applied reference at J8.
Position B selects the on-board 2.5 V reference.
Dual function input.
In parallel mode, this switch should be placed in its center position.
In serial mode, this switch selects the interface.
Position H selects the I
Position L selects the SPI interface.
In both parallel and SPI modes, this switch should be set to its center position.
In I
Position H sets AD0 = 1.
Position L sets AD0 = 0.
In parallel mode, this switch should be set to its center position.
In I
Position H sets AD1 = 1.
Position L sets AD1 = 0.
In SPI mode, this switch selects the state of daisy-chain mode.
Position H enables daisy-chain mode.
Position L disables daisy-chain mode.
This switch selects the state of the input FIFO.
Position H enables the input FIFO.
Position L disables the input FIFO.
This switch selects the mode.
Position H selects serial mode.
Position L selects parallel mode.
This switch selects the power-down state.
Position H powers down the AD538x.
Position L removes the AD538x from power-down.
2
2
C mode, this switch selects the state of the Address Bit AD0.
C mode, this switch selects the state of the Address Bit AD1.
2
C interface.
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CC
and must be brought low by the digital interface to update the DACs.
EVAL-AD5380/81/82/83EB