EVAL-AD1955EBZ Analog Devices Inc, EVAL-AD1955EBZ Datasheet - Page 4

• Manufacturer Part Number: EVAL-AD1955EBZ
• Description: Eval Board For 24 Bit 192kHZ DAC 120 DB
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD1955EBZ

• Number Of Dac's: 2
• Number Of Bits: 24
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD1955
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1955
SPECIFICATIONS
GROUP DELAY
Chip Mode
INT8
INT4
INT2
Specifications subject to change without notice.
DIGITAL TIMING
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Specifications subject to change without notice.
DMP
DML
DMH
DBH
DBL
DBP
DLS
DLH
DWH
DWL
DDS
DDH
DPHS
DSDS
DSDH
DSKP
DSKH
DSKL
DMP
DML
DMH
CLS
CLH
CDS
CDH
RSTL
Mode
Mode
Mode
(Guaranteed over –40 C to +85 C, AVDD = DVDD = 5.0 V
Group Delay Calculation
5553/(128
5601/(64
5659/(32
Description
MCLK Period (F
MCLK LO Pulsewidth (All Modes)
MCLK HI Pulsewidth (All Modes)
BCLK/EF_BCLK High
BCLK/EF_BCLK Low
BCLK/EF_BCLK Period
LRCLK/EF_WCLK Setup
LRCLK Hold (DSP Serial Port Mode Only)
EF_WCLK High
EF_WCLK Low
SDATA/EF_LDATA/EF_RDATA Setup
SDATA/EF_LDATA/EF_RDATA Hold
DSD_PHASE Setup
DSD_DATA Setup
DSD_DATA Hold
DSD_SCLK Period
DSD_SCLK High
DSD_SCLK Low
CCLK Period
CCLK LO Pulsewidth
CCLK HI Pulsewidth
CLATCH Setup
CLATCH Hold
CDATA Setup
CDATA Hold
RST LO Pulsewidth
(continued)
f
f
S
S
f
)
)
S
)
MCLK
= 256
F
LRCLK
–4–
)
f
48
96
192
S
(kHz)
10%.)
Group Delay
903.8
911.6
921
Min
50
0.4
0.4
20
20
60
0
15
20
20
0
20
20
5
5
60
20
20
50
15
10
0
15
0
5
10
t
t
DMP
DMP
Unit
µs
µs
µs
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
REV. 0