DSPIC33FJ64MC204T-I/ML Microchip Technology, DSPIC33FJ64MC204T-I/ML Datasheet - Page 197
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DSPIC33FJ64MC204T-I/ML
Manufacturer Part Number
DSPIC33FJ64MC204T-I/ML
Description
16-bit DSC, 64KB Flash,Motor, DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC204T-I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC33FJ64MC204T-I/MLTR
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13.0
FIGURE 13-1:
FIGURE 13-2:
© 2011 Microchip Technology Inc.
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
Note 1: This data sheet summarizes the features
TxCK
2: Some registers and associated bits
TIMER2/3 AND TIMER4/5
FEATURE
of
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Section 11. Timers”
(DS70205) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
TxCK
the
F
TYPE B TIMER BLOCK DIAGRAM (x = 2 or 4)
TYPE C TIMER BLOCK DIAGRAM (x = 3 or 5)
CY
Sync
dsPIC33FJ32MC302/304,
TCKPS<1:0>
Prescaler
F
(/n)
CY
TCKPS<1:0>
TCKPS<1:0>
Prescaler
Prescaler
Sync
Gate
(/n)
(/n)
TCKPS<1:0>
Prescaler
Sync
Gate
Sync
(/n)
family
and
of
in
Falling Edge
Falling Edge
Detect
Detect
TGATE
TGATE
TCS
TCS
Timer2 and Timer4 are Type B timers with the following
specific features:
• A Type B timer can be concatenated with a Type
• The external clock input (TxCK) is always
A block diagram of the Type B timer is shown in
Figure
Timer3 and Timer5 are Type C timers with the following
specific features:
• A Type C timer can be concatenated with a Type
• At least one Type C timer has the ability to trigger
• The external clock input (TxCK) is always syn-
A block diagram of the Type C timer is shown in
Figure
C timer to form a 32-bit timer
synchronized to the internal device clock and the
clock synchronization is performed after the
prescaler
B timer to form a 32-bit timer
an A/D conversion
chronized to the internal device clock and the
clock synchronization is performed before the
prescaler
10
00
x1
10
00
x1
13-1.
13-2.
Comparator
Comparator
TMRx
PRx
TMRx
PRx
Reset
Equal
Equal
Reset
TGATE
1
0
ADC SOC Trigger
TGATE
Set TxIF flag
1
0
DS70291E-page 197
Set TxIF flag
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