DSPIC33FJ128MC204-E/PT Microchip Technology, DSPIC33FJ128MC204-E/PT Datasheet - Page 253
![16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC33FJ128MC204-E/PT
Manufacturer Part Number
DSPIC33FJ128MC204-E/PT
Description
16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128MC204-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128MC204-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 253 of 436
- Download datasheet (6Mb)
REGISTER 21-4:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-5
bit 4-0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
R/W-0
U-0
—
DMABS<2:0>
DMABS<2:0>: DMA Buffer Size bits
111 = Reserved
110 = 32 buffers in DMA RAM
101 = 24 buffers in DMA RAM
100 = 16 buffers in DMA RAM
011 = 12 buffers in DMA RAM
010 = 8 buffers in DMA RAM
001 = 6 buffers in DMA RAM
000 = 4 buffers in DMA RAM
Unimplemented: Read as ‘0’
FSA<4:0>: FIFO Area Starts with Buffer bits
11111 = Read buffer RB31
11110 = Read buffer RB30
•
•
•
00001 = TX/RX buffer TRB1
00000 = TX/RX buffer TRB0
R/W-0
U-0
—
CiFCTRL: ECAN™ FIFO CONTROL REGISTER
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
—
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
FSA<4:0>
R/W-0
U-0
—
x = Bit is unknown
R/W-0
U-0
—
DS70291E-page 253
R/W-0
U-0
—
bit 8
bit 0
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