DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 26

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
TABLE 1-1:
DS70616E-page 26
PMA0
PMA1
PMA2 -PMA13
PMBE
PMCS1, PMCS2
PMD0-PMD7
PMRD
PMWR
FLT1-FLT7
DTCMP1-DTCMP7
PWM1L-PWM7L
PWM1H-PWM7H
SYNCI1, SYNCI2
SYNCO1, SYNCO2
V
V
V
D+
D-
USBID
USBOEN
V
V
V
V
V
VMIO
VPIO
DMH
DPH
DMLN
DPLN
RCV
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
MCLR
AV
AV
Legend: CMOS = CMOS compatible input or output
Note 1:
BUS
USB
BUSON
BUSST
CPCON
CMPST
CMPST
CMPST
DD (2)
SS
Pin Name
2:
1
2
3
ST = Schmitt Trigger input with CMOS levels
PPS = Peripheral Pin Select
This pin is available on dsPIC33EPXXXMU806/810/814 devices only.
AV
(1)
DD
(1)
must be connected at all times.
PINOUT I/O DESCRIPTIONS (CONTINUED)
(1)
(1)
(1)
(1)
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
P
P
I
I
I
I
I
I
I
I
I
I
I
I
I
TTL/ST
TTL/ST
TTL/ST
Analog
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P
P
PPS
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Parallel Master Port Address Bit 0 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address Bit 1 Input (Buffered Slave modes) and
Output (Master modes).
Parallel Master Port Address Bits 2 - 13 (Demultiplexed Master Modes).
Parallel Master Port Byte Enable Strobe.
Parallel Master Port Chip Select 1 and 2 Strobe.
Parallel Master Port Data (Demultiplexed Master mode) or Address/
Data (Multiplexed Master modes).
Parallel Master Port Read Strobe.
Parallel Master Port Write Strobe.
PWM Fault input 1 through 7.
PWM Dead Time Compensation Input.
PWM Low output 1 through 7.
PWM High output 1 through 7.
PWM Synchronization Inputs 1 and 2.
PWM Synchronization Output 1 and 2.
USB Bus Power Monitor.
USB Internal Transceiver Supply. If the USB module is not being used,
this pin must be connected to V
USB Host and On-The-Go (OTG) Bus Power Control Output.
USB D+ I/O pin.
USB D- I/O pin.
USB OTG ID Detect.
USB Output Enabled Control (for external transceiver).
USB Boost Controller Overcurrent Detection.
USB Boost Controller PWM Signal.
USB External Comparator 1 Input.
USB External Comparator 2 Input.
USB External Comparator 3 Input.
USB Differential Minus Input/Output (external transceiver).
USB Differential Plus Input/Output (external transceiver).
D- External Pull-up Control Output.
D+ External Pull-up Control Output.
D- External Pull-down Control Output.
D+ External Pull-down Control Output.
USB Receive Input (from external transceiver).
Data I/O pin for programming/debugging communication channel 1.
Clock input pin for programming/debugging communication channel 1.
Data I/O pin for programming/debugging communication channel 2.
Clock input pin for programming/debugging communication channel 2.
Data I/O pin for programming/debugging communication channel 3.
Clock input pin for programming/debugging communication channel 3.
Master Clear (Reset) input. This pin is an active-low Reset to the
device.
Positive supply for analog modules. This pin must be connected at all
times.
Ground reference for analog modules.
Preliminary
Analog = Analog input
O = Output
TTL = TTL input buffer
Description
DD
.
 2009-2011 Microchip Technology Inc.
P = Power
I = Input