DAC8043FSZ Analog Devices Inc, DAC8043FSZ Datasheet - Page 13

• Manufacturer Part Number: DAC8043FSZ
• Description: 12 BIT SERIAL INPUT DAC
• Manufacturer: Analog Devices Inc

Specifications of DAC8043FSZ

• Settling Time: 250ns
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 500µW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bipolar Operation (4-Quadrant)
Figure 19 details a suggested circuit for bipolar, or offset binary,
operation. Table 7 shows the digital input to analog output
relationship. The circuit uses offset binary coding. Twos comple-
ment code can be converted to offset binary by software
inversion of the MSB or by the addition of an external inverter
to the MSB input.
Table 7. Bipolar (Offset Binary) Code Table
Digital Input
MSB
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0001
0000 0000 0000
1
2
Resistors R
and they all must be of the same (preferably metal foil) type to
ensure temperature coefficient matching. Mismatching between
R
and R
Calibration is performed by loading the DAC register with 1000
0000 0000 and adjusting R
omitted, adjusting the ratio of R
Nominal full scale for Figure 19 circuits is given by
Nominal LSB magnitude for Figure 19 circuits is given by
3
and R
FS
LSB
3
mismatch results in full-scale error.

4

causes offset and full-scale errors, while an R
V
3
V
, R
REF
LSB
REF
4



, and R
2047
2048



2048
1



5



must be selected to match within 0.01%,
Nominal Analog Output
(V
0





1
V
V
V
V
V
V
OUT
until V
IN
REF
REF
REF
REF
REF
as Shown in Figure 19)
3















to R
2047
2048
2048
2048
2047
2048
2048
2048
OUT
1
1
100Ω
4
R
= 0 V. R
to yield V
1















V
CONTROL
CONTROL
REF
INPUTS
Figure 19. Bipolar Operation (4-Quadrant, Offset Binary)
1, 2
1
BITS
V
5V
and R
DD
OUT
DAC8043
= 0 V. Full
SERIAL
2
INPUT
DATA
R
SRI
5
may be
FB
to R
GND
50Ω
I
R
OUT
2
4
Rev. E | Page 13 of 16
COMMON
ANALOG
C
10.33pF
1
OP200
1/2
A
1
scale can be adjusted by loading the DAC register with 1111
1111 1111 and either adjusting the amplitude of V
value of R
Analog/Digital Division
The transfer function for the DAC8043 connected in the
multiplying mode, as shown in Figure 16, Figure 17, and
Figure 19, is
where A
The transfer function is modified when the DAC is connected
in the feedback of an operational amplifier, as shown in Figure 18
and becomes
The previous transfer function is the division of an analog
voltage (V
with all bits off because division by zero is infinity. With all bits
on the gain is 1 (±1 LSB). The gain becomes 4096 with the LSB,
Bit 12, on.
V
V
O
O

10kΩ

X
R






assumes a value of 1 for an on bit and 0 for an off bit.
5

3
REF
A
2
until the desired V
V
1
1
) by a digital word. The amplifier goes to the rails
IN




V
R
20kΩ
A
2
IN
A
4
2
2
OP200
2
1
1

1/2
A

Figure 18. Analog/Digital Divider

V
2
20kΩ
A
2
R
A
2
IN
3
3
5
2
2
R
I

OUT

LD SRI CLK
FB
2
3
DAC8043
...
A
2
DIGITAL
OP42
A
3
INPUT
3
2
GND
12
4

...
OUT






V
V
A
2
V
REF
6
OUT
12
12
DD
is achieved.



5V
V
OUT
DAC8043
REF
or the