DAC8043FSZ Analog Devices Inc, DAC8043FSZ Datasheet - Page 11

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DAC8043FSZ

Manufacturer Part Number
DAC8043FSZ
Description
12 BIT SERIAL INPUT DAC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of DAC8043FSZ

Settling Time
250ns
Number Of Bits
12
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
500µW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DAC8043FSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
To further ensure accuracy across the full temperature range,
permanently on MOS switches were included in series with
the feedback resistor and the terminating resistor of the R-2R
ladder. The simplified DAC circuit, Figure 13, shows the location
of the series switches. These series switches are equivalently
scaled to two times Switch S1 (MSB) and to Switch S12 (LSB),
respectively, to maintain constant relative voltage drops with
varying temperature. During any testing of the resistor ladder
or R
to turn on these series switches.
EQUIVALENT CIRCUIT ANALYSIS
Figure 14 shows an equivalent analog circuit for the DAC8043.
The (D × V
current generated by the DAC. The current source, I
of surface and junction leakages and doubles approximately
every 10°C. C
the N-channel MOS switches and varies from 80 pF to 110 pF,
depending on the digital input code. R
put resistance that also varies with digital input code. R is the
nominal R-2R resistor ladder resistance.
DYNAMIC PERFORMANCE
Output Impedance
The output resistance of the DAC8043, as in the case of the
output capacitance, varies with the digital input code. This
resistance, looking back into the I
10 kΩ (the feedback resistor alone when all digital inputs are low)
and 7.5 kΩ (the feedback resistor in parallel with approximately
30 kΩ of the R-2R ladder network resistance when any single bit
logic is high). Static accuracy and dynamic performance will be
V
REF
(SWITCHES SHOWN FOR DIGITAL INPUTS (HIGH))
FEEDBACK
V
BIT 1 (MSB) BIT 2
REF
20kΩ
S1
10kΩ
REF
(such as incoming inspection), V
OUT
)/R current source is code dependent and is the
R
DIGITAL INPUTS
Figure 14. Equivalent Analog Circuit
is the output capacitance; it is the result of
20kΩ
S2
Figure 13. Simplified DAC Circuit
10kΩ
D × V
BIT 3
R
20kΩ
REF
S3
*THESE SWITCHES PERMANENTLY ON.
10kΩ
BIT 12 (LSB)
R
OUT
20kΩ
S12
terminal, may be between
O
I
LKG
is the equivalent out-
20kΩ
*
*
R
DD
10kΩ
C
must be present
OUT
GND
I
R
OUT
LKG
FEEDBACK
R
I
GND
OUT
, consists
FB
Rev. E | Page 11 of 16
affected by these variations. This variation is best illustrated by
using the circuit of Figure 15 and the following equation:
where:
R
Therefore, the offset gain varies as follows:
The error difference is 2/3 V
Because one LSB has a weight (for V
the DAC8043, it is clearly important that V
either by using the amplifier’s nulling pins or an external nulling
network or by selecting an amplifier with inherently low V
Amplifiers with sufficiently low V
and OP42.
The gain and phase stability of the output amplifier, board
layout, and power supply decoupling all affect the dynamic
performance. The use of a small compensation capacitor may
be required when high speed operational amplifiers are used. It
may be connected across the feedback resistor of the amplifier
to provide the necessary phase compensation to critically damp
the output. The output capacitance of the DAC8043 and the R
resistor form a pole that must be outside the amplifier’s unity
gain crossover frequency.
The considerations when using high speed amplifiers are:
1.
2.
O
= 10 kΩ for more than four bits of Logic 1.
= 30 kΩ for any single bit of Logic 1.
is a function of the digital code and
At Code 0011 1111 1111,
At Code 0100 0000 0000,
Phase compensation (see Figure 16 and Figure 17).
Power supply decoupling at the device socket and the use
of proper grounding techniques.
V
V
V
V
REF
ERROR
ERROR
ERROR
1
2
=
=
=
V
V
2R
V
OS
OS
OS
R
1
1
1
+
+
Figure 15. Simplified Circuit
+
10
10
10
30
R
R
2R
FB
O
R
OS
=
=
.
2
4
V
3 /
OS
2R
OS
V
OS
include OP77, OP07, OP27,
REF
R
= 10 V) of 2.4 mV for
V
OS
ETC
OS
OP77
be minimized,
R
FB
DAC8043
OS
.
FB

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