CY7C68013A-56PVXCT Cypress Semiconductor Corp, CY7C68013A-56PVXCT Datasheet - Page 44

CY7C68013A-56PVXCT

CY7C68013A-56PVXCT

Manufacturer Part Number
CY7C68013A-56PVXCT
Description
CY7C68013A-56PVXCT
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r
Datasheet

Specifications of CY7C68013A-56PVXCT

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, USART, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
 Details
Other names
CY7C68013A56PVXCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C68013A-56PVXCT
Manufacturer:
CYPRESS
Quantity:
9 103
10.8 Slave FIFO Asynchronous Read
Table 22. Slave FIFO Asynchronous Read Parameters
Document #: 38-08032 Rev. *M
Note
t
t
t
t
t
t
RDpwl
RDpwh
XFLG
XFD
OEon
OEoff
23. Slave FIFO asynchronous parameter values use internal IFCLK setting at 48 MHz.
Parameter
SLRD Pulse Width LOW
SLRD Pulse Width HIGH
SLRD to FLAGS Output Propagation Delay
SLRD to FIFO Data Output Propagation Delay
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
FLAGS
DATA
Figure 19. Slave FIFO Asynchronous Read Timing Diagram
SLOE
SLRD
Description
t
OEon
N
[23]
t
RDpwl
t
XFD
N+1
t
XFLG
t
t
RDpwh
OEoff
Min
50
50
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
[20]
Max
10.5
10.5
15
70
Page 44 of 62
Unit
ns
ns
ns
ns
ns
ns
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