CY7C1470BV33-200AXC Cypress Semiconductor Corp, CY7C1470BV33-200AXC Datasheet - Page 10

• Manufacturer Part Number: CY7C1470BV33-200AXC
• Description: CY7C1470BV33-200AXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1470BV33-200AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Truth Table
The truth table for CY7C1470BV25, CY7C1472BV25, and CY7C1474BV25 follows.
Notes
Document Number: 001-15032 Rev. *H
Deselect Cycle
Continue Deselect Cycle
Read Cycle (Begin Burst)
Read Cycle (Continue Burst)
NOP/Dummy Read (Begin Burst)
Dummy Read (Continue Burst)
Write Cycle (Begin Burst)
Write Cycle (Continue Burst)
NOP/Write Abort (Begin Burst)
Write Abort (Continue Burst)
Ignore Clock Edge (Stall)
Sleep Mode
1. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for ALL Chip Enables active. BW
2. Write is defined by WE and BW
3. When a write cycle is detected, all IOs are tri-stated, even during Byte Writes.
4. The DQ and DQP pins are controlled by the current cycle and the OE signal.
5. CEN = H inserts wait states.
6. Device powers up deselected with the IOs in a tri-state condition, regardless of OE.
7. OE is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles.During a Read cycle DQ
signifies that the desired Byte Write Selects are asserted, see
inactive or when the device is deselected, and DQ
Operation
[a:d]
. See
Partial Write Cycle Description on page 11
Address
External
External
External
Current
Used
None
None
None
None
Next
Next
Next
Next
s
= data when OE is active.
Partial Write Cycle Description on page 11
CE
H
X
L
X
L
X
L
X
L
X
X
X
ZZ
H
L
L
L
L
L
L
L
L
L
L
L
ADV/LD
H
H
H
H
H
L
L
L
L
X
X
L
for details.
WE
CY7C1472BV25, CY7C1474BV25
X
X
H
X
H
X
X
X
X
X
L
L
x
= L signifies at least one Byte Write Select is active, BW
BW
[1, 2, 3, 4, 5, 6, 7]
X
X
X
X
X
X
H
H
X
X
L
L
for details.
x
OE
X
X
H
H
X
X
X
X
X
X
L
L
CEN
H
X
L
L
L
L
L
L
L
L
L
L
s
and DQP
CLK
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
CY7C1470BV25
X
[a:d]
= tri-state when OE is
Data Out (Q)
Data Out (Q)
Data In (D)
Data In (D)
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Page 10 of 28
DQ
–
x
= Valid
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