CY7C1041D-10ZSXIT Cypress Semiconductor Corp, CY7C1041D-10ZSXIT Datasheet

CY7C1041D-10ZSXIT

CY7C1041D-10ZSXIT

Manufacturer Part Number
CY7C1041D-10ZSXIT
Description
CY7C1041D-10ZSXIT
Manufacturer
Cypress Semiconductor Corp

Specifications of CY7C1041D-10ZSXIT

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
4M (256K x 16)
Speed
10ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSOP II
Density
4Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
18b
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
90mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Word Size
16b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
Selection Guide
Cypress Semiconductor Corporation
Document #: 38-05472 Rev. *F
Logic Block Diagram
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Note
1. For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at www.cypress.com.
Pin-and function-compatible with CY7C1041B
High speed
Low active power
Low CMOS standby power
2.0 V data retention
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free 44-Pin (400-Mil) Molded SOJ and 44-Pin
TSOP II packages
t
I
I
AA
CC
SB2
= 10 ns
= 90 mA at 10 ns (Industrial)
= 10 mA
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
–10 (Industrial)
198 Champion Court
INPUT BUFFER
DECODER
COLUMN
10
90
10
256K x 16
4-Mbit (256 K × 16) Static RAM
Functional Description
The CY7C1041D is a high-performance CMOS static RAM
organized as 256K words by 16 bits. Writing to the device is
accomplished by taking Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
specified on the address pins (A
Enable (BHE) is LOW, then data from I/O pins (I/O
I/O
(A
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins will
appear on I/O
data from memory will appear on I/O
at the back of this data sheet for a complete description of read
and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), the BHE and BLE are
disabled (BHE, BLE HIGH), or during a write operation (CE LOW,
and WE LOW).
The CY7C1041D is available in a standard 44-pin 400-mil-wide
body width SOJ and 44-pin TSOP II package with center power
and ground (revolutionary) pinout.
0
15
through A
) is written into the location specified on the address pins
–12 (Automotive)
San Jose
17
0
to I/O
).
12
95
15
0
I/O
through I/O
I/O
7
,
0
8
. If Byte High Enable (BHE) is LOW, then
–I/O
–I/O
BHE
WE
CE
OE
BLE
CA 95134-1709
[2]
0
7
15
through I/O
7
), is written into the location
0
[1]
through A
8
to I/O
15
) are placed in a
Revised April 21, 2011
15
CY7C1041D
Unit
mA
mA
17
ns
. See the truth table
). If Byte High
408-943-2600
8
through
[+] Feedback

Related parts for CY7C1041D-10ZSXIT

CY7C1041D-10ZSXIT Summary of contents

Page 1

... HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1041D is available in a standard 44-pin 400-mil-wide body width SOJ and 44-pin TSOP II package with center power and ground (revolutionary) pinout. ...

Page 2

... Data Retention Waveform ................................................ 6 Document #: 38-05472 Rev. *F Switching Waveforms ...................................................... 7 Truth Table ...................................................................... 10 Ordering Information ...................................................... 10 Ordering Code Definitions ......................................... 10 Package Diagrams .......................................................... 11 Acronyms ........................................................................ 12 Document Conventions ................................................. 12 Units of Measure ....................................................... 12 Document History Page ................................................. 13 Sales, Solutions, and Legal Information ...................... 14 Worldwide Sales and Design Support ....................... 14 Products .................................................................... 14 PSoC Solutions ......................................................... 14 CY7C1041D Page [+] Feedback ...

Page 3

... I/O I I/O I I/O I Static Discharge Voltage............ ...............................>2001 V (per MIL-STD-883, Method 3015) Latch-up Current...................................................... >200 mA Operating Range ...–0 +6.0 V Range +0 Industrial +0 Automotive CY7C1041D Ambient V Speed CC Temperature 5 V ± 0.5 –40°C to +85° ± 0.5 –40°C to +125° Page [+] Feedback ...

Page 4

... < MAX , CE > V – 0 > V – 0 < 0 Test Conditions T = 25° MHz 5 Test Conditions Still Air, soldered × 4.5 inch, four-layer printed circuit board CY7C1041D -12 (Automotive) Max Min Max Unit 2.4 V 0.4 0 0 0.8 –0.5 0.8 V μA +1 –1 +1 μA +1 –1 ...

Page 5

... CC is less than less than less than t HZCE LZCE HZOE LZOE HZBE CY7C1041D ALL INPUT PULSES 90% 90% 10% 10% ≤ (b) THÉ VENIN EQUIVALENT 167Ω 1.73 V –12 (Automotive) Max Min Max Unit μs 100 ...

Page 6

... Min Over the Operating Range [13] Conditions 2 > V – 0 > V – 0 < 0 DATA RETENTION MODE 4 > CDR and t HZWE > 50 μs or stable at V > 50 μ CC(Min) CC(Min CY7C1041D –12 (Automotive) Max Min Max Unit Min Max Unit 2.0 V Ind’ Auto 4.5 V ...

Page 7

... CE t ACE OE t DOE BHE, BLE t LZOE t DBE t LZBE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT Document #: 38-05472 Rev. *F [13, 14] Figure 2. Read Cycle No OHA t RC DATA VALID 50% CY7C1041D DATA VALID [15,16] t HZOE t HZCE t HZBE HIGH IMPEDANCE t PD ICC 50% ISB Page [+] Feedback ...

Page 8

... WE is HIGH for read cycle. 16. Address valid prior to or coincident with CE transition LOW 17. Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05472 Rev. *F [17, 18 SCE PWE PWE t SCE CY7C1041D Page [+] Feedback ...

Page 9

... BHE, BLE ADDRESS BHE, BLE DATA I/O NOTE Note 19. During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05472 Rev SCE PWE t SD DATA VALID SCE PWE HZWE SD 19 CY7C1041D [16, 17 LZWE Page [+] Feedback ...

Page 10

... Ordering Information Table 1 lists the CY7C1041D key package features and ordering codes. The table contains only the parts that are currently available. If you do not see what you are looking for, contact your local sales representative. For more information, visit the Cypress website at www ...

Page 11

... Package Diagrams Figure 8. 44-Pin (400-Mil) Molded SOJ (51-85082) Document #: 38-05472 Rev. *F Figure 9. 44-pin TSOP II (51-85087) CY7C1041D 51-85082 *C 51-85087 *B 51-85087 *C Page [+] Feedback ...

Page 12

... Thin Small Outline Package VFBGA Very Fine-Pitch Ball Grid Array Document #: 38-05472 Rev. *F Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes mV milli Volts mW milli Watts MHz Mega Hertz pF pico Farad °C degree Celcius W Watts CY7C1041D Page [+] Feedback ...

Page 13

... Document History Page Document Title: CY7C1041D 4-Mbit (256K x 16) Static RAM Document Number: 38-05472 Orig. of Submission Revision ECN Change ** 201560 SWI *A 233729 RKF *B 351117 PCI *C 446328 NXR *D 2897049 VKN *E 3109184 AJU 12/13/2010 Added *F 3236731 PRAS 04/21/2011 Template updates. Document #: 38-05472 Rev. *F ...

Page 14

... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-05472 Rev. *F All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised April 21, 2011 CY7C1041D PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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