CY62157EV30LL-45ZXA Cypress Semiconductor Corp, CY62157EV30LL-45ZXA Datasheet - Page 9
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CY62157EV30LL-45ZXA
Manufacturer Part Number
CY62157EV30LL-45ZXA
Description
CY62157EV30LL-45ZXA
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY62157EV30LL-45ZSXI.pdf
(17 pages)
Specifications of CY62157EV30LL-45ZXA
Format - Memory
RAM
Memory Type
SRAM
Memory Size
8M (512K x 16)
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP I
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY62157EV30LL-45ZXA
Manufacturer:
EPCOS
Quantity:
1 001
Switching Waveforms
Notes
Document #: 38-05445 Rev. *H
Figure 8
Figure 9
23. The internal write time of the memory is defined by the overlap of WE, CE = V
24. Data I/O is high impedance if OE = V
25. If CE
26. During this period, the I/Os are in output state. Do not apply input signals.
write and any of these signals can terminate a write by going inactive. The data input setup and hold timing must be referenced to the edge of the signal that
terminates the write.
ADDRESS
ADDRESS
BHE/BLE
BHE/BLE
DATA I/O
DATA I/O
1
goes HIGH and CE
shows WE Controlled write cycle waveforms.
shows CE
CE
CE
CE
CE
WE
WE
OE
OE
1
2
1
2
NOTE 26
NOTE 26
1
or CE
2
goes LOW simultaneously with WE = V
2
Controlled write cycle waveforms.
(continued)
IH
t
.
SA
t
t
HZOE
HZOE
t
SA
Figure 8. Write Cycle No. 1
Figure 9. Write Cycle No. 1
t
t
AW
AW
[23, 24, 25]
IH
, the output remains in a high impedance state.
t
SCE
t
t
WC
WC
[23, 24, 25]
IL
, BHE, BLE or both = V
t
t
BW
BW
VALID DATA
VALID DATA
t
t
t
t
PWE
PWE
SD
SD
t
SCE
IL
, and CE
2
t
t
HD
HD
= V
t
t
CY62157EV30 MoBL
HA
HA
IH
. All signals must be active to initiate a
Page 9 of 17
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