CS8422-CNZR Cirrus Logic Inc, CS8422-CNZR Datasheet - Page 56

• Manufacturer Part Number: CS8422-CNZR
• Description: IC 24-bit 192kHz SRC S/PDIF Receiver
• Manufacturer: Cirrus Logic Inc

56
11.14 Receiver Error Unmasking (0Eh)
11.15 Interrupt Unmasking (0Fh)
ACTIVEM
PCCHM
7
0
7
SORES2[1:0] - Resolution of the output data on SDOUT
SOFSEL2[1:0] - Format of the output data on SDOUT
RECEIVER ERROR MASK[7:0]
The bits[7:0] in this register serve as masks for the corresponding bits of the Receiver Error Register. If a
mask bit is set to 1, the error is unmasked, meaning that its occurrence will appear in the receiver error reg-
ister, will affect RERR[6:0], will affect the RERR interrupt, and will affect the current audio sample according
to the status of the HOLD bit. If a mask bit is set to 0, the error is masked, meaning that its occurrence will
not appear in the receiver error register, will not affect the RERR pin, will not affect the RERR interrupt, and
will not affect the current audio sample. The ACTIVE, CCRC, and QCRC bits behave differently from the
other bits: they do not affect the current audio sample even when unmasked. If QCRC, CCRC, CONF, BIP,
or PARM are unmasked, and RERRM in register 0Fh is unmasked, then RERR[1:0] should be set to “Rising
Edge Active” in the Interrupt Mode register (register 10h). This register defaults to 00h.
The bits of this register serve as a mask for the Interrupt Status register. If a mask bit is set to 1, the error
is unmasked, meaning that its occurrence will affect the INT pin and the status register. If a mask bit is set
00 - 24-bit resolution.
01 - 20-bit resolution.
10 - 18-bit resolution.
11 - 16-bit resolution
00 - Left-Justified
01 - I²S
10 - Right-Justified (Master mode only)
11 - AES3 Direct. Direct copy of the received NRZ data from the AES3 receiver including C, U, and V bits.
The time slot occupied by the Z bit is used to indicate the location of the block start. Only valid if serial port
source is the AES3-compatible receiver.
OSLIPM
QCRCM
6
0
6
0
0010
0011
0100
0101
0110
1000
0111
Table 10. OSCLK2/OLRCK2 Ratios and SOSF1 Settings
DETCM
CCRCM
5
0
5
0
UNLOCKM
CCHM
4
0
4
0
1024
128
192
256
384
512
768
RERRM
3
0
VM
3
0
QCHM
64
48
64
48
64
48
64
CONFM
2
0
2
0
FCHM
128
128
128
128
96
96
96
BIPM
1
0
1
0
SRC_UNLOCKM
CS8422
DS692PP1
PARM
0
0
0
0