CS8406-DSZR Cirrus Logic Inc, CS8406-DSZR Datasheet - Page 3

• Manufacturer Part Number: CS8406-DSZR
• Description: IC,Digital Audio Transmitter,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

DS580F5
LIST OF FIGURES
LIST OF TABLES
15. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958 TRANSMITTER COMPONENTS ................... 38
16. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........................ 39
17. REVISION HISTORY ......................................................................................................................... 42
Figure 1. Audio Port Master Mode Timing ................................................................................................... 6
Figure 2. Audio Port Slave Mode and Data Input Timing............................................................................. 6
Figure 3. SPI Mode Timing .......................................................................................................................... 7
Figure 4. I²C Mode Timing ........................................................................................................................... 8
Figure 5. Recommended Connection Diagram for Software Mode ............................................................. 9
Figure 6. Recommended Connection Diagram for Hardware Mode .......................................................... 10
Figure 7. Serial Audio Input Example Formats .......................................................................................... 12
Figure 8. AES3 Transmitter Timing for C, U, and V Pin Input Data, Stereo Mode..................................... 14
Figure 9. AES3 Transmitter Timing for C, U, and V Pin Input Data, Mono Mode ...................................... 15
Figure 10. Control Port Timing in SPI Mode .............................................................................................. 16
Figure 11. Control Port Timing, I²C Slave Mode Write............................................................................... 17
Figure 12. Control Port Timing, I²C Slave Mode Read............................................................................... 17
Figure 13. Hardware Mode Data Flow ....................................................................................................... 28
Figure 14. Professional Output Circuit ....................................................................................................... 38
Figure 15. Consumer Output Circuit (VL = 5.0 V) ...................................................................................... 38
Figure 16. TTL/CMOS Output Circuit......................................................................................................... 38
Figure 17. Channel Status Data Buffer Structure....................................................................................... 39
Figure 18. Flowchart for Writing the E Buffer ............................................................................................. 40
Table 1. Control Register Map Summary................................................................................................... 18
Table 2. Hardware Mode COPY/C and ORIG Pin Functions..................................................................... 29
Table 3. Hardware Mode Serial Audio Port Format Selection ................................................................... 29
Table 4. Hardware Mode OMCK Clock Ratio Selection............................................................................. 29
Table 5. Equivalent Register Settings of Serial Audio Input Formats in Hardware Mode .......................... 29
15.1 AES3 Transmitter External Components .................................................................................... 38
15.2 Isolating Transformer Requirements .......................................................................................... 38
16.1 AES3 Channel Status(C) Bit Management ................................................................................. 39
16.2 AES3 User (U) Bit Management ................................................................................................. 41
16.1.1 Accessing the E buffer ................................................................................................... 39
16.1.2 Serial Copy Management System (SCMS) .................................................................... 40
16.1.3 Channel Status Data E Buffer Access ........................................................................... 40
16.2.1 Mode 1: Transmit All Zeros ............................................................................................ 41
16.2.2 Mode 2: Block Mode ...................................................................................................... 41
CS8406
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