CS5368-DQZR Cirrus Logic Inc, CS5368-DQZR Datasheet - Page 28

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CS5368-DQZR

Manufacturer Part Number
CS5368-DQZR
Description
IC,A/D CONVERTER,OCTAL,24-BIT,QFP,48PIN
Manufacturer
Cirrus Logic Inc
Datasheets

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4.9.2 I²C Mode
There is a MAP auto-increment capability, which is enabled by the INCR bit in the MAP register. If INCR
is a zero, the MAP will stay constant for successive read or writes. If INCR is set to a 1, the MAP will auto
increment after each byte is read or written, allowing block reads or writes of successive registers.
To read a register, the MAP has to be set to the correct address by executing a partial write cycle that
finishes (CS high) immediately after the MAP byte. The MAP auto increment bit (INCR) may be set or not,
as desired. To begin a read, bring CS low, send out the chip address and set the read/write bit (R/W) high.
The next falling edge of CCLK will clock out the MSB of the addressed register (CDOUT will leave the high
impedance state). If the MAP auto increment bit is set to 1, the data for successive registers will appear
consecutively
In I²C mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL.
There is no CS pin. Pins AD0 and AD1 form the two least significant bits of the chip address and should
be connected through a resistor to VLC or DGND as desired. The state of the pins is latched when the
CS5368 is being released from RST.
A Start condition is defined as a falling transition of SDA while SCL is high. A Stop condition is a rising
transition of SDA while SCL is high. All other transitions of SDA occur while SCL is low. The first byte sent
to the CS5368 after a Start condition consists of a 7-bit chip address field and a R/W bit (high for a read,
low for a write). The upper five bits of the 7-bit address field are fixed at 10011. To communicate with a
CS5368
followed by the settings of the AD1 and AD0. The eighth bit of the address is the R/W bit. If the operation
is a write, the next byte is the Memory Address Pointer (MAP) which selects the register to be read or
written. If the operation is a read, the contents of the register pointed to by the MAP will be output. Setting
the auto increment bit in MAP allows successive reads or writes of consecutive registers. Each byte is
separated by an acknowledge bit. The ACK bit is output from the CS5368 after each input byte is read
and is input to the CS5368 from the microcontroller after each transmitted byte.
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. The write
operation is aborted after the acknowledge for the MAP byte by sending a Stop condition. The following
pseudocode illustrates an aborted write operation followed by a read operation.
Send start condition.
Send 10011xx0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
CS
C C L K
C D IN
C D O U T
, the chip address field, which is the first byte sent to the CS5368, should match 10011 and be
ADDRESS
MAP = Memory Address Pointer, 8 bits, MSB first
1001111
C H I P
High Impedance
R/W
M A P
MSB
b y te 1
Figure 15. SPI Format
DATA
b y te n
LSB
A D D R E S S
C H IP
1001111
R/W
MSB
LSB MSB
LSB
CS5368
DS624A1

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