CS42888-CQZ Cirrus Logic Inc, CS42888-CQZ Datasheet - Page 28

• Manufacturer Part Number: CS42888-CQZ
• Description: IC,Soundcard Circuits,CMOS,QFP,64PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42888-CQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 108 (Differential), 102 / 105 (Single-Ended)
• Voltage - Supply, Analog: 3.14 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• No. Of Adcs: 2
• No. Of Dacs: 4
• No. Of Input Channels: 8
• No. Of Output Channels: 4
• Adc / Dac Resolution: 24bit
• Ic Interface Type: Serial
• Supply Voltage Range: 3.14V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1183

28
4.3.5
4.3.6
4.3.7
Line-Level Outputs and Filtering
The CS42888 contains on-chip buffer amplifiers capable of producing line-level differential as well as sin-
gle-ended outputs on AOUT1-AOUT8. These amplifiers are biased to a quiescent DC level of approxi-
mately VQ.
The delta-sigma conversion process produces high-frequency noise beyond the audio passband, most of
which is removed by the on-chip analog filters. The remaining out-of-band noise can be attenuated using
an off-chip low-pass filter.
See
for the normally differing AC loads on the AOUTx+ and AOUTx- differential output pins. Also shown is a
passive filter configuration which minimizes costs and the number of components.
Figure 12
VA/2.
Digital Volume Control
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to
-127.5 dB attenuation with 0.5 dB resolution. See
page
trolled by the SZC[1:0] bits in the Digital Volume Control register. See
on page
Each output can be independently muted via mute control bits in the register
dress 07h)” on page
maximum value (-127.5 dB). When the AOUTx_MUTE bit is disabled, the corresponding DAC returns to
the attenuation level set in the Volume Control register. The attenuation is ramped up and down at the
rate specified by the SZC[1:0] bits.
De-Emphasis Filter
The CS42888 includes on-chip digital de-emphasis optimized for a sample rate of 44.1 kHz. The filter re-
sponse is shown in
that utilize 50/15 μs pre-emphasis equalization as a means of noise reduction.
“DAC Output Filter” on page 53
47. Volume control changes are programmable to ramp in increments of 0.125 dB at the rate con-
45.
shows the full-scale analog output levels. All outputs are internally biased to VQ, approximately
5.0 V
Figure
47. When enabled, each AOUTx_MUTE bit attenuates the corresponding DAC to its
VA
13. The de-emphasis feature is included to accommodate audio recordings
AOUTx+
AOUTx-
Figure 12. Full-Scale Output
for recommended output filter. The active filter configuration accounts
(AOUTx+) - (AOUTx-) = 6.5 V
Full-Scale Differential Output Level =
“AOUTX Volume Control (Addresses 08h- 0Fh)” on
PP
= 2.3 V
RMS
“Transition Control (Address 06h)”
2.5 V
2.5 V
4.125 V
0.875 V
4.125 V
0.875 V
“DAC Channel Mute (Ad-
CS42888
DS717F2