CS42888-CQZ Cirrus Logic Inc, CS42888-CQZ Datasheet - Page 2

• Manufacturer Part Number: CS42888-CQZ
• Description: IC,Soundcard Circuits,CMOS,QFP,64PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42888-CQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 108 (Differential), 102 / 105 (Single-Ended)
• Voltage - Supply, Analog: 3.14 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• No. Of Adcs: 2
• No. Of Dacs: 4
• No. Of Input Channels: 8
• No. Of Output Channels: 4
• Adc / Dac Resolution: 24bit
• Ic Interface Type: Serial
• Supply Voltage Range: 3.14V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1183

2
TABLE OF CONTENTS
1. PIN DESCRIPTIONS
2. TYPICAL CONNECTION DIAGRAM
3. CHARACTERISTICS AND SPECIFICATIONS .................................................................................... 10
4. APPLICATIONS ................................................................................................................................... 24
RECOMMENDED OPERATING CONDITIONS ................................................................................... 10
ABSOLUTE MAXIMUM RATINGS ....................................................................................................... 10
ANALOG INPUT CHARACTERISTICS (COMMERCIAL) .................................................................... 11
ANALOG INPUT CHARACTERISTICS (AUTOMOTIVE) ..................................................................... 12
ADC DIGITAL FILTER CHARACTERISTICS ....................................................................................... 13
ANALOG OUTPUT CHARACTERISTICS (COMMERCIAL) ................................................................ 14
ANALOG OUTPUT CHARACTERISTICS (AUTOMOTIVE) ................................................................. 15
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE .............................. 17
SWITCHING SPECIFICATIONS - ADC/DAC PORT ............................................................................ 18
SWITCHING CHARACTERISTICS - AUX PORT ................................................................................. 20
SWITCHING SPECIFICATIONS - CONTROL PORT - I²C MODE ....................................................... 21
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI FORMAT ................................................. 22
DC ELECTRICAL CHARACTERISTICS .............................................................................................. 23
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ..................................................... 23
1.1 Digital I/O Pin Characteristics ........................................................................................................... 8
4.1 Overview ......................................................................................................................................... 24
4.2 Analog Inputs .................................................................................................................................. 24
4.3 Analog Outputs ............................................................................................................................... 25
4.4 System Clocking ............................................................................................................................. 29
4.5 CODEC Digital Interface Formats .................................................................................................. 30
4.6 AUX Port Digital Interface Formats ................................................................................................ 33
4.7 Control Port Description and Timing ............................................................................................... 33
4.8 Interrupts ........................................................................................................................................ 36
4.9 Recommended Power-Up Sequence ............................................................................................. 36
4.10 Reset and Power-Up .................................................................................................................... 36
4.11 Power Supply, Grounding, and PCB Layout ................................................................................ 36
4.2.1 Line-Level Inputs ................................................................................................................... 24
4.2.2 High-Pass Filter and DC Offset Calibration ........................................................................... 25
4.3.1 Initialization ............................................................................................................................ 25
4.3.2 Output Transient Control ....................................................................................................... 27
4.3.3 Popguard ............................................................................................................................... 27
4.3.4 Mute Control .......................................................................................................................... 27
4.3.5 Line-Level Outputs and Filtering ........................................................................................... 28
4.3.6 Digital Volume Control ........................................................................................................... 28
4.3.7 De-Emphasis Filter ................................................................................................................ 28
4.5.1 I²S .......................................................................................................................................... 31
4.5.2 Left-Justified .......................................................................................................................... 31
4.5.3 Right-Justified ........................................................................................................................ 31
4.5.4 OLM #1 .................................................................................................................................. 31
4.5.5 OLM #2 .................................................................................................................................. 32
4.5.6 TDM ....................................................................................................................................... 32
4.5.7 I/O Channel Allocation ........................................................................................................... 33
4.6.1 I²S .......................................................................................................................................... 33
4.6.2 Left-Justified .......................................................................................................................... 33
4.7.1 SPI Mode ............................................................................................................................... 34
4.7.2 I²C Mode ................................................................................................................................ 34
4.3.3.1 Power-Up ................................................................................................................... 27
4.3.3.2 Power-Down .............................................................................................................. 27
........................................................................................................................ 6
................................................................................................. 9
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