CS42435-CMZ Cirrus Logic Inc, CS42435-CMZ Datasheet - Page 42

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CS42435-CMZ

Manufacturer Part Number
CS42435-CMZ
Description
IC,Soundcard Circuits,CMOS,QFP,52PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Datasheets

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42
7.6
7.6.1
7.6.2
7.6.3
ADC1-2_HPF
FREEZE
7
ADC Control & DAC De-Emphasis (Address 05h)
ADC1-2 High-Pass Filter Freeze (ADC1-2_HPF FREEZE)
Default = 0
Function:
When this bit is set, the internal high-pass filter will be disabled for ADC1 and ADC2.The current DC offset
value will be frozen and continue to be subtracted from the conversion result. See
Characteristics” on page
DAC De-Emphasis Control (DAC_DEM)
Default = 0
0 - No De-Emphasis
1 - De-Emphasis Enabled (Auto-Detect Fs)
Function:
Enables the digital filter to maintain the standard 15μs/50μs digital de-emphasis filter response at the
auto-detected sample rate of either 32, 44.1, or 48 kHz. De-emphasis will not be enabled, regardless of
this register setting, at any other sample rate.
ADC1 Single-Ended Mode (ADC1 SINGLE)
Default = 0
0 - Disabled; Differential input to ADC1
1 - Enabled; Single-Ended input to ADC1
Function:
When enabled, this bit allows the user to apply a single-ended input to the positive terminal of ADC1. A
+6 dB digital gain is automatically applied to the serial audio data of ADC1. The negative leg must be driv-
en to the common mode of the ADC. See
Reserved
6
DAC_DEM
5
16.
SINGLE
ADC1
4
Figure 20 on page 48
SINGLE
ADC2
3
for a graphical description.
Reserved
2
Reserved
1
“ADC Digital Filter
CS42435
Reserved
DS685F2
0

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