CS4207-CNZ Cirrus Logic Inc, CS4207-CNZ Datasheet - Page 99

• Manufacturer Part Number: CS4207-CNZ
• Description: IC Low Pwr,4/6 HD Aud Codec W/HP Amp
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS4207-CNZ

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 2.97 V ~ 5.25 V
• Voltage - Supply, Digital: 2.97 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1796

DS880F1
6.11.6 Power States
Get Parameter Command Format:
Set Parameter Command Format:
Response Format:
Bits [31:28]
Bits [31:28]
CAd = X
CAd = X
31:11
Bits
7:4
10
3
2
1
0
9
8
Line In 1 Node ID=0Ch
Line In 1 Node ID=0Ch
Mic In 1 Node ID=0Dh
Mic In 1 Node ID=0Dh
Bits [27:20]
Bits [27:20]
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Type
Verb ID = F05h
Verb ID = 705h
Bits [19:8]
Bits [19:8]
00000h
Default
0011b
1b
0b
0b
1b
1b
0b
0b
D3 is Supported. Since Extended Power States
is also supported, the pin widget will maintain the
ability to generate an Unsolicited Response (if
this function is enabled) while in the D3 state.
D2 is not Supported
D1 is not Supported
D0 Supported
Reserved
Power State Settings Reset(PS-SettingsRe-
set): This bit is set to ‘1’b when, during any type
of reset or low power state transition, the settings
within this widget that were changed from the
defaults, either by software or hardware, have
been reset back to their default state. When
these settings have not been reset, this is
reported as ‘0’b. This bit is always a ‘1’b follow-
ing a POR condition.
see
tingsReset)” on p 27
Power State Clock Stop OK(PS-ClkStopOK):
This bit is not supported and will always return
‘0’b when read.
Power State Error (PS-Error): This bit is not
supported and will always return ‘0’b when read.
Power State Actual (PS-Act): This field indi-
cates the actual power state of the referenced
node. The default state is D3.
“Power State Settings Reset (PS-Set-
Parameter ID = 00h
Parameter ID = 0xh
Description
Bits [7:0]
Bits [7:0]
For more information,
CS4207
99