CS4207-CNZ Cirrus Logic Inc, CS4207-CNZ Datasheet - Page 72

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CS4207-CNZ

Manufacturer Part Number
CS4207-CNZ
Description
IC Low Pwr,4/6 HD Aud Codec W/HP Amp
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS4207-CNZ

Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 3
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 110
Voltage - Supply, Analog
2.97 V ~ 5.25 V
Voltage - Supply, Digital
2.97 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1796

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72
6.7.6
PS-Set is a PowerState field which defines the current power setting of the referenced node. Since this
node is of type other than an Audio Function Group node, the actual power state is a function of both this
setting and the PowerState setting of the Audio Function Group node under which this node was enumer-
ated (is controlled).
PS-Act is a PowerState field which indicates the actual power state of this node. Within the Audio Func-
tion Group node, this field will always be equal to the PS-Set field (modulo the time required to execute a
power state transition). Within this type of node, this field will be the lower power consuming state of either
a) the PS-Set field of the currently referenced node or b) the PS-Set field of the Audio Function Group
node under which the currently referenced node was enumerated (is controlled).
Converter Stream, Channel
Get Parameter Command Format:
Set Parameter Command Format:
Bits [31:28]
Bits [31:28]
CAd = X
CAd = X
7:4
3:0
10
9
8
S/P Tx 1 Node ID=08h
S/P Tx 2 Node ID=14h
S/P Tx 1 Node ID=08h
S/P Tx 2 Node ID=14h
Read/Write
Bits [27:20]
Bits [27:20]
Read Only
Read Only
Read Only
Read Only
Verb ID = F06h
Verb ID = 706h
Bits [19:8]
Bits [19:8]
0011b
0011b
1b
0b
0b
Power State Settings Reset(PS-SettingsRe-
set): This bit is set to ‘1’b when, during any type
of reset or low power state transition, the settings
within this widget that were changed from the
defaults, either by software or hardware, have
been reset back to their default state. When
these settings have not been reset, this is
reported as ‘0’b. This bit is always a ‘1’b follow-
ing a POR condition.
see
tingsReset)” on p 27
Power State Clock Stop OK(PS-ClkStopOK):
This bit is not supported and will always return
‘0’b when read.
Power State Error (PS-Error): This bit is not
supported and will always return ‘0’b when read.
Power State Actual (PS-Act): This field indi-
cates the actual power state of the referenced
node. The default state is D3.
Power State Set (PS-Set): Writes to these bits
set the Audio Function Group to the Power State
as described below:
PSS = ’0000’b; D0 - Fully on.
PSS = ‘0001’b; D1 - Not Supported
PSS = ‘0010’b; D2 - Not Supported
PSS = ‘0011’b; D3 - Allows for lowest possible
power consumption under software control. See
“D3 Lower Power State Support” on page 25
more information.
PSS = ‘0100’b; D4 - Not Supported
“Power State Settings Reset (PS-Set-
Parameter ID = 00h
Parameter ID = xxh
Bits [7:0]
Bits [7:0]
For more information,
CS4207
DS880F1
for

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