AM29LV800DT-90ED Spansion Inc., AM29LV800DT-90ED Datasheet - Page 5

• Manufacturer Part Number: AM29LV800DT-90ED
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.
• Series: AM29r

Specifications of AM29LV800DT-90ED

• Memory Size: 8Mbit
• Package/case: 48-TSOP
• Supply Voltage Max: 3V
• Leaded Process Compatible: Yes
• Peak Reflow Compatible (260 C): Yes
• Access Time, Tacc: 90nS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Command Definitions . . . . . . . . . . . . . . . . . . . . . 15
Write Operation Status . . . . . . . . . . . . . . . . . . . . 20
Am29LV800D_00_A6 May 5, 2006
Special Handling Instructions for FBGA Package .. 6
Standard Products .................................................. 8
Word/Byte Configuration ........................................ 9
Requirements for Reading Array Data ................... 9
Writing Commands/Command Sequences .......... 10
Program and Erase Operation Status .................. 10
Standby Mode ...................................................... 10
Automatic Sleep Mode ......................................... 10
RESET#: Hardware Reset Pin ............................. 10
Output Disable Mode ............................................ 11
Autoselect Mode ................................................... 12
Sector Protection/Unprotection ............................ 13
Temporary Sector Unprotect ................................ 13
Hardware Data Protection .................................... 15
Low V
Write Pulse “Glitch” Protection ............................. 15
Logical Inhibit ....................................................... 15
Power-Up Write Inhibit ......................................... 15
Reading Array Data .............................................. 15
Reset Command .................................................. 15
Autoselect Command Sequence .......................... 15
Word/Byte Program Command Sequence ........... 16
Unlock Bypass Command Sequence ................... 16
Chip Erase Command Sequence ......................... 17
Sector Erase Command Sequence ...................... 17
Erase Suspend/Erase Resume Commands ......... 18
DQ7: Data# Polling ............................................... 20
RY/BY#: Ready/Busy# ......................................... 21
DQ6: Toggle Bit I .................................................. 21
DQ2: Toggle Bit II ................................................. 21
Reading Toggle Bits DQ6/DQ2 ............................ 21
DQ5: Exceeded Timing Limits .............................. 22
DQ3: Sector Erase Timer ..................................... 22
Table 1. Am29LV800D Device Bus Operations ............9
Table 2. Am29LV800DT Top Boot Block
Sector Addresses ........................................................11
Table 3. Am29LV800DB Bottom Boot Block
Sector Addresses ........................................................12
Table 4. Am29LV800D Autoselect Codes
(High Voltage Method) ................................................13
Figure 1. Temporary Sector Unprotect Operation....... 13
Figure 2. In-System Sector Protect/
Sector Unprotect Algorithms ....................................... 14
Figure 3. Program Operation ...................................... 17
Figure 4. Erase Operation........................................... 18
Table 5. Am29LV800D Command Definitions ............19
Figure 5. Data# Polling Algorithm ............................... 20
CC
Write Inhibit ............................................ 15
D A T A
Am29LV800D
S H E E T
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 24
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 24
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Key to Switching Waveforms. . . . . . . . . . . . . . . . 27
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28
Erase and Programming Performance . . . . . . . 39
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 39
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 40
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 42
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 44
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 25
Commercial (C) Devices ...................................... 24
Industrial (I) Devices ............................................. 24
V
CMOS Compatible ............................................... 25
Read Operations .................................................. 28
Hardware Reset (RESET#) .................................. 29
Word/Byte Configuration (BYTE#)
Erase/Program Operations ................................... 31
Temporary Sector Unprotect ................................ 35
Alternate CE# Controlled
Erase/Program Operations ................................... 37
TS 048—48-Pin Standard TSOP ........................ 40
FBB 048—48-Ball Fine-Pitch Ball Grid Array
(FBGA) 6 x 9 mm ................................................ 41
VBK 048 - 48 Ball Fine-Pitch Ball Grid Array (FBGA)
6.15 x 8.15 mm ..................................................... 42
SO 044—44-Pin Small Outline Package ............. 43
CC
Figure 6. Toggle Bit Algorithm..................................... 22
Table 6. Write Operation Status ..................................23
Figure 9. I
Automatic Sleep Currents) .......................................... 26
Figure 10. Typical I
Figure 11. Test Setup.................................................. 27
Table 7. Test Specifications ........................................27
Figure 12. Input Waveforms and
Measurement Levels ................................................... 27
Figure 13. Read Operations Timings .......................... 28
Figure 14. RESET# Timings........................................ 29
Figure 15. BYTE# Timings for Read Operations......... 30
Figure 16. BYTE# Timings for Write Operations ......... 30
Figure 17. Program Operation Timings ....................... 32
Figure 18. Chip/Sector Erase Operation Timings........ 33
Figure 19. Data# Polling Timings (During
Embedded Algorithms)................................................ 34
Figure 20. Toggle Bit Timings (During
Embedded Algorithms)................................................ 34
Figure 21. DQ2 vs. DQ6.............................................. 35
Figure 22. Temporary Sector Unprotect
Timing Diagram ........................................................... 35
Figure 23. Sector Protect/Unprotect
Timing Diagram ........................................................... 36
Figure 24. Alternate CE# Controlled Write
Operation Timings ....................................................... 38
Supply Voltages ............................................ 24
CC1
Current vs. Time (Showing Active and
CC1
vs. Frequency ......................... 26
..................... 30
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