AM29LV320DT90EI AMD (ADVANCED MICRO DEVICES), AM29LV320DT90EI Datasheet - Page 30

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AM29LV320DT90EI

Manufacturer Part Number
AM29LV320DT90EI
Description
Flash Memory IC
Manufacturer
AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV320DT90EI

Memory Configuration
4M X 8 / 2M X 16 Bit
Package/case
48-TSOP
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Access Time, Tacc
90nS
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DQ2, or RY/BY# in the erasing sector. Refer to “Write
Operation Status” on page 30 for information on these
status bits.
Once the sector erase operation begins, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a hardware
reset immediately terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once the device returns to read-
ing array data, to ensure data integrity.
Figure 5, on page 28
erase operation. Refer to table “Erase and Program
Operations” on page 41 for parameters, and
19, on page 43
Erase Suspend/Erase Resume
Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected
for erasure. This command is valid only during the sec-
tor erase operation, including the 50 µs time-out pe-
riod during the sector erase command sequence. The
Erase Suspend command is ignored if written during
the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of 20 µs to suspend the erase operation. How-
ever, when the Erase Suspend command is written
during the sector erase time-out, the device immedi-
ately terminates the time-out period and suspends the
erase operation.
After the erase operation is suspended, the device en-
ters the erase-suspend-read mode. The system can
read data from or program data to any sector not se-
lected for erasure. (The device “erase suspends” all
sectors selected for erasure.) Reading at any address
within erase-suspended sectors produces status infor-
mation on DQ7–DQ0. The system can use DQ7, or
DQ6 and DQ2 together, to determine if a sector is ac-
tively erasing or is erase-suspended. Refer to the
“Write Operation Status” on page 30 section for infor-
mation on these status bits.
After an erase-suspended program operation is com-
plete, the device returns to the erase-suspend-read
28
for timing diagrams.
illustrates the algorithm for the
D A T A S H E E T
Figure
Am29LV320D
mode. The system can determine the status of the
program operation using the DQ7 or DQ6 status bits,
just as in the standard Byte Program operation.
Refer to “Write Operation Status” on page 30 for more
information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. Refer to
“Autoselect Mode” on page 16 and “Autoselect Com-
mand Sequence” on page 25 for details.
To resume the sector erase operation, the system
must write the Erase Resume command. Further
writes of the Resume command are ignored. Another
Erase Suspend command can be written after the chip
resumes erasing.
Notes:
1. See Table 14 on page 29 for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.
No
Figure 5. Erase Operation
Command Sequence
Data Poll to Erasing
Erasure Completed
Bank from System
Write Erase
Data = FFh?
(Notes 1, 2)
START
Yes
December 14, 2005
Embedded
Erase
algorithm
in progress

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