AM29LV320DT90EI AMD (ADVANCED MICRO DEVICES), AM29LV320DT90EI Datasheet - Page 12

• Manufacturer Part Number: AM29LV320DT90EI
• Description: Flash Memory IC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV320DT90EI

• Memory Configuration: 4M X 8 / 2M X 16 Bit
• Package/case: 48-TSOP
• Supply Voltage Max: 3.6V
• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Access Time, Tacc: 90nS
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
Legend: L = Logic Low = V
A
Notes:
1. Addresses are A20:A0 in word mode (BYTE# = V
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See “Sector/Sector
3. If WP#/ACC = V
4. D
10
Read
Write
Accelerated Program
Standby
Output Disable
Reset
Sector Protect (Note 2)
Sector Unprotect
(Note 2)
Temporary Sector
Unprotect
IN
Block Protection and Unprotection” on page 17.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection” on page 17. If WP#/ACC = V
= Address In, D
IN
Operation
or D
OUT
as required by command sequence, data polling, or sector protection algorithm.
IL
IN
, the two outermost boot sectors remain protected. If WP#/ACC = V
= Data In, D
V
0.3 V
CE#
CC
IL
X
X
L
L
L
L
L
L
, H = Logic High = V
±
OE#
OUT
H
H
X
H
X
H
H
X
L
Table 1. Am29LV320D Device Bus Operations
= Data Out
WE#
H
H
L
X
X
X
L
L
L
HH
, all sectors are unprotected.
RESET#
IH
V
0.3 V
, V
D A T A S H E E T
V
V
V
CC
H
H
H
H
L
ID
ID
ID
ID
IH
±
), A20:A-1 in byte mode (BYTE# = V
= 11.5–12.5 V, V
Am29LV320D
WP#/ACC
(Note 3)
(Note 3)
(Note 3)
V
L/H
L/H
L/H
L/H
H
HH
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Table 1 lists the device bus operations, the in-
puts and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
HH
A1 = H, A0 = L
A1 = H, A0 = L
SA, A6 = H,
Addresses
SA, A6 = L,
= 11.5–12.5 V, X = Don’t Care, SA = Sector Address,
(Note 2)
A
A
A
A
X
X
X
IN
IN
IN
IN
IH
, the two outermost boot sector protection
(Note 4) (Note 4)
(Note 4) (Note 4)
(Note 4)
(Note 4)
(Note 4) (Note 4)
High-Z
High-Z
High-Z
DQ0–
D
DQ7
IL
OUT
).
BYTE#
High-Z
High-Z
High-Z
= V
D
OUT
X
X
IH
December 14, 2005
DQ8–DQ15
DQ15 = A-1
DQ8–DQ14
= High-Z,
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
IL