ADUC842BCPZ62-3 Analog Devices Inc, ADUC842BCPZ62-3 Datasheet - Page 83

Microconverter 1-cycle Version ADUC832

ADUC842BCPZ62-3

Manufacturer Part Number
ADUC842BCPZ62-3
Description
Microconverter 1-cycle Version ADUC832
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheets

Specifications of ADUC842BCPZ62-3

Core Processor
8052
Core Size
8-Bit
Speed
8.38MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
DMA, PSM, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
62KB (62K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
56-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Parameter
SPI MASTER MODE TIMING (CPHA = 0)
t
t
t
t
t
t
t
t
t
t
1
SL
SH
DAV
DOSU
DSU
DHD
DF
DR
SR
SF
Characterized under the following conditions:
a. Core clock divider bits CD2, CD1, and CD0 bits in PLLCON SFR set to 0, 1, and 1, respectively, i.e., core clock frequency = 2.09 MHz.
b. SPI bit-rate selection bits SPR1 and SPR0 in SPICON SFR set to 0 and 0, respectively.
(CPOL = 0)
(CPOL = 1)
SCLOCK Low Pulse Width
SCLOCK High Pulse Width
Data Output Valid after SCLOCK Edge
Data Output Setup before SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
SCLOCK
SCLOCK
MOSI
MISO
t
DOSU
t
DSU
MSB IN
1
MSB
1
t
DHD
t
SH
t
DF
Figure 92. SPI Master Mode Timing (CPHA = 0)
t
DAV
t
SL
t
DR
Rev. 0 | Page 83 of 88
BITS 6–1
BITS 6–1
LSB IN
t
SR
LSB
ADuC841/ADuC842/ADuC843
Min
100
100
t
SF
Typ
476
476
10
10
10
10
Max
50
150
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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