ADSP-21065LCCA-240 Analog Devices Inc, ADSP-21065LCCA-240 Datasheet - Page 33

• Manufacturer Part Number: ADSP-21065LCCA-240
• Description: ADSP-21065 60 Mhz Mini BGA
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-21065LCCA-240

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Serial Port
• Clock Rate: 60MHz
• Non-volatile Memory: External
• On-chip Ram: 64kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-CSPBGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 60MHz
• Mips: 60
• Device Input Clock Speed: 60MHz
• Ram Size: 68KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: CSPBGA
• Lead Free Status / Rohs Status: Not Compliant
• Other names: ADSP-21065LCCA240

REV. C
TFS ("LATE", EXT.)
TFS ("LATE", INT.)
DATA RECEIVE– INTERNAL CLOCK
DATA TRANSMIT– INTERNAL CLOCK
RCLK
TCLK
RFS
TFS
DR
DT
TCLK (EXT)
TCLK (INT)
DRIVE
DRIVE
EDGE
EDGE
DT
DT
t
t
HOFSE
t
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK, TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK OR TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
HOFSI
HDTI
t
DFSE
t
t
DRIVE
EDGE
DRIVE
DFSI
EDGE
DDTI
t
t
DDTIN
DDTEN
t
t
SCLKIW
SCLKIW
t
TFS, RFS, DT
t
t
TCLK, RCLK
SFSI
SFSI
SDRI
RCLK (INT)
TCLK (INT)
CLKIN
SAMPLE
SAMPLE
EDGE
EDGE
t
t
t
HFSI
HDRI
HFSI
SPORT DISABLE DELAY
FROM INSTRUCTION
Figure 20. Serial Ports
LOW TO HIGH ONLY
t
DCLK
t
DPTR
–33–
TCLK / RCLK
TCLK / RCLK
DATA RECEIVE– EXTERNAL CLOCK
DATA TRANSMIT– EXTERNAL CLOCK
RCLK
TCLK
RFS
TFS
DR
DT
SPORT ENABLE AND
THREE-STATE
LATENCY
IS TWO CYCLES
DRIVE
DRIVE
EDGE
EDGE
t
t
t
HOFSE
HOFSE
DRIVE
DRIVE
EDGE
EDGE
HDTE
t
t
t
DFSE
DFSE
DDTTI
t
t
DDTE
DDTTE
t
t
SCLKW
SCLKW
t
t
t
SFSE
SDRE
SFSE
ADSP-21065L
SAMPLE
SAMPLE
EDGE
EDGE
t
t
t
HFSE
HDRE
HFSE