ADP1871ACPZ-0.3-R7 Analog Devices Inc, ADP1871ACPZ-0.3-R7 Datasheet - Page 28

• Manufacturer Part Number: ADP1871ACPZ-0.3-R7
• Description: 300kHz, Light Load Eff Enabled
• Manufacturer: Analog Devices Inc

Specifications of ADP1871ACPZ-0.3-R7

• Frequency - Max: 300kHz
• Pwm Type: Current Mode
• Number Of Outputs: 1
• Duty Cycle: 84%
• Voltage - Supply: 2.95 V ~ 20 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 10-WFDFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP1871ACPZ-0.3-R7; ADP1871ACPZ-0.3-R7TR

ADP1870/ADP1871
THERMAL CONSIDERATIONS
The ADP1870/ADP1871 are used for dc-to-dc, step down, high
current applications that have an on-board controller, an on-board
LDO, and on-board MOSFET drivers. Because applications may
require up to 20 A of load current delivery and be subjected to
high ambient temperature surroundings, the selection of external
upper- and lower-side MOSFETs must be associated with careful
thermal consideration to not exceed the maximum allowable
junction temperature of 125°C. To avoid permanent or irreparable
damage if the junction temperature reaches or exceeds 155°C, the
part enters thermal shutdown, turning off both external MOSFETs,
and does not reenable until the junction temperature cools to
140°C (see the On-Board Low Dropout Regulator section).
In addition, it is important to consider the thermal impedance
of the package. Because the ADP1870/ADP1871 employ an on-
board LDO, the ac current (fxCxV) consumed by the internal
drivers to drive the external MOSFETs adds another element of
power dissipation across the internal LDO. Equation 3 shows the
power dissipation calculations for the integrated drivers and for
the internal LDO.
Table 9 lists the thermal impedance for the ADP1870/ADP1871,
which are available in both 10-lead MSOP and 10-lead LFCSP
packages.
Table 9. Thermal Impedance for 10-lead MSOP
Parameter
10-Lead MSOP θ
10-Lead LFCSP θ
Figure 83 specifies the maximum allowable ambient temperature
that can surround the ADP1870/ADP1871 IC for a specified
high input voltage (V
derating conditions for each available switching frequency for
low, typical, and high output setpoints for both the 10-lead
MSOP and LFCSP packages. All temperature derating criteria
are based on a maximum IC junction temperature of 125°C.
2-Layer Board
4-Layer Board
4-Layer Board
Figure 83. Ambient Temperature vs. V
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
4-Layer EVB, CIN = 4.3 nF (Upper-/Lower-Side MOSFET)
5.5
7.0
JA
JA
600kHz
300kHz
1MHz
8.5
IN
). Figure 83 illustrates the temperature
10.0
11.5
V
V
V
OUT
OUT
OUT
V
IN
Thermal Impedance
213.1°C/W
171.7°C/W
40°C/W
13.0
IN
(V)
= 0.8V
= 1.8V
= HIGH SETPOINT
for 10-Lead MSOP (171°C/W),
14.5
16.0
17.5
19.0
Rev. A | Page 28 of 44
The maximum junction temperature allowed for the ADP1870/
ADP1871 ICs is 125°C. This means that the sum of the ambient
temperature (T
which is caused by the thermal impedance of the package and
the internal power dissipation, should not exceed 125°C, as
dictated by the following expression:
where:
T
T
T
dissipated from within.
The rise in package temperature is directly proportional to its
thermal impedance characteristics. The following equation
represents this proportionality relationship:
where:
θ
the outside surface of the die, where it meets the surrounding air.
P
The bulk of the power dissipated is due to the gate capacitance
of the external MOSFETs and current running through the on-
board LDO. The power loss equations for the MOSFET drivers
and internal low dropout regulator (see the MOSFET Driver
Loss section in the Efficiency Consideration section) are:
where:
C
C
I
side drivers.
V
minus the rectifier drop (see Figure 81)).
V
BIAS
JA
DR(LOSS)
A
J
R
upperFET
lowerFET
DR
REG
is the maximum junction temperature.
is the ambient temperature.
is the rise in package temperature due to the power
is the thermal resistance of the package from the junction to
Figure 84. Ambient Temperature vs. V
is the driver bias voltage (the low input voltage (V
is the dc current (2 mA) flowing into the upper- and lower-
T
T
P
[ V
is the LDO output/bias voltage.
DR(LOSS)
J
R
= T
REG
130
125
120
115
110
105
100
= θ
is the input gate capacitance of the lower-side MOSFET.
is the input gate capacitance of the upper-side MOSFET.
is the overall power dissipated by the IC.
95
90
85
80
4-Layer EVB, CIN = 4.3 nF (Upper-/Lower-Side MOSFET)
5.5
× ( f
R
JA
× T
= [ V
× P
SW
7.0
A
A
C
) and the rise in package temperature (T
DR(LOSS)
600kHz
300kHz
1MHz
DR
lowerFET
8.5
× ( f
SW
V
10.0
C
REG
upperFET
+ I
11.5
V
V
V
BIAS
OUT
OUT
OUT
V
V
IN
13.0
DR
)]
= 0.8V
= 1.8V
= HIGH SETPOINT
(V)
IN
for 10-Lead LFCSP (40°C/W),
+ I
14.5
BIAS
)] +
16.0
17.5
19.0
REG
R
)
),
(1)
(2)
(3)