ADP1871ACPZ-0.3-R7 Analog Devices Inc, ADP1871ACPZ-0.3-R7 Datasheet - Page 20
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ADP1871ACPZ-0.3-R7
Manufacturer Part Number
ADP1871ACPZ-0.3-R7
Description
300kHz, Light Load Eff Enabled
Manufacturer
Analog Devices Inc
Datasheet
1.ADP1870-0.3-EVALZ.pdf
(44 pages)
Specifications of ADP1871ACPZ-0.3-R7
Frequency - Max
300kHz
Pwm Type
Current Mode
Number Of Outputs
1
Duty Cycle
84%
Voltage - Supply
2.95 V ~ 20 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 125°C
Package / Case
10-WFDFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADP1871ACPZ-0.3-R7
ADP1871ACPZ-0.3-R7TR
ADP1871ACPZ-0.3-R7TR
ADP1870/ADP1871
VIN and VREG be tied together if the VIN pin is subjected to a
2.75 V rail.
Table 5. Power Input and LDO Output Configurations
VIN
>5.5 V
<5.5 V
<5.5 V
Ranges above
and below 5.5 V
THERMAL SHUTDOWN
The thermal shutdown is a self-protection feature to prevent the
IC from damage due to a very high operating junction temperature.
If the junction temperature of the device exceeds 155°C, the part
enters the thermal shutdown state. In this state, the device shuts off
both the upper- and lower-side MOSFETs and disables the entire
controller immediately, thus reducing the power consumption of
the IC. The part resumes operation after the junction temperature
of the part cools to less than 140°C.
PROGRAMMING RESISTOR (RES) DETECT CIRCUIT
Upon startup, one of the first blocks to become active is the RES
detect circuit. This block powers up before soft start begins. It
forces a 0.4 V reference value at the DRVL output (see Figure 68)
and is programmed to identify four possible resistor values: 47 kΩ,
22 kΩ, open, and 100 kΩ.
The RES detect circuit digitizes the value of the resistor at the
DRVL pin (Pin 6). An internal ADC outputs a 2-bit digital code
that is used to program four separate gain configurations in the
current-sense amplifier (see Figure 69). Each configuration corre-
sponds to a current-sense gain (A
24 V/V, respectively (see Table 6 and Table 7). This variable is used
for the valley current-limit setting, which sets up the appropriate
current-sense gain for a given application and sets the compensation
necessary to achieve loop stability (see the Valley Current-Limit
Setting and Compensation Network sections).
Figure 68. Programming Resistor Location
PROGRAMMING
VREG
Float
Connect to VIN
Float
Float
ADP1870/
ADP1871
CS GAIN
DRVH
DRVL
SW
CS
R
) of 3 V/V, 6 V/V, 12 V/V,
RES
Comments
Must use the LDO
LDO drop voltage is not
realized (that is, if V
2.75 V, then V
LDO drop is realized
LDO drop is realized,
minimum V
mendation is 2.95 V
Q1
Q2
IN
REG
recom-
= 2.75 V)
IN
=
Rev. A | Page 20 of 44
Table 6. Current-Sense Gain Programming
Resistor
47 kΩ
22 kΩ
Open
100 kΩ
VALLEY CURRENT-LIMIT SETTING
The architecture of the ADP1870/ADP1871 is based on valley
current-mode control. The current limit is determined by three
components: the R
fier output voltage swing (COMP), and the current-sense gain.
The COMP range is internally fixed at 1.4 V. The current-sense
gain is programmable via an external resistor at the DRVL pin (see
the Programming Resistor (RES) Detect Circuit section). The
R
usually has a positive T
ture); therefore, it is recommended to program the current-sense
gain resistor based on the rated R
Because the ADP1870/ADP1871 are based on valley current
control, the relationship between I
where:
K
desired average load current (see Figure 70).
I
I
Establishing K
Inductor Selection section), but in most cases K
CLIM
LOAD
ON
I
is the ratio between the inductor ripple current and the
of the lower-side MOSFET can vary over temperature and
Figure 69. RES Detect Circuit for Current-Sense Gain Programming
is the desired valley current limit.
is the current load.
I
CLIM
Figure 70. Valley Current Limit to Average Current Relation
=
LOAD CURRENT
CS GAIN SET
VALLEY CURRENT LIMIT
I
A
3 V/V
6 V/V
12 V/V
24 V/V
LOAD
DRVL
I
CS
helps to determine the inductor value (see the
AMP
CS
ON
×
RES
⎛ −
⎜
⎝
of the lower-side MOSFET, the error ampli-
1
C
(meaning that it increases with tempera-
ADC
K
2
RIPPLE CURRENT =
I
⎞
⎟
⎠
ON
CLIM
of the MOSFET at 125°C.
0.4V
and I
I
LOAD
LOAD
3
SW
PGND
I
is as follows:
= 0.33.