ADP150AUJZ-1.8-R7 Analog Devices Inc, ADP150AUJZ-1.8-R7 Datasheet - Page 5

• Manufacturer Part Number: ADP150AUJZ-1.8-R7
• Description: 150mA Ultra-Low Noise LDO 1.8 Vout
• Manufacturer: Analog Devices Inc

Specifications of ADP150AUJZ-1.8-R7

• Design Resources: Broadband Low EVM Direct Conversion Transmitter (CN0134) Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144) Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147)
• Regulator Topology: Positive Fixed
• Voltage - Output: 1.8V
• Voltage - Input: 2.2 ~ 5.5 V
• Voltage - Dropout (typical): 0.105V @ 150mA
• Number Of Regulators: 1
• Current - Output: 150mA (Max)
• Current - Limit (min): 190mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: TSOT-23-5, TSOT-5, TSOP-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP150AUJZ-1.8-R7TR

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP150 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that T
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature (T
ambient temperature (T
and the junction-to-ambient thermal resistance of the package
(θ
Maximum junction temperature (T
ambient temperature (T
JA
).
T
J
= T
A
+ (P
D
× θ
JA
A
)
), the power dissipation of the device (P
A
J
) of the device is dependent on the
) and power dissipation (P
J
is within the specified temperature
J
) is calculated from the
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to +6.5 V
−65°C to +150°C
−40°C to +125°C
−40°C to +85°C
JEDEC J-STD-020
D
) by
Rev. A | Page 5 of 20
D
),
The junction-to-ambient thermal resistance (θ
is based on modeling and a calculation using a 4-layer board.
The junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
PCB material, layout, and environmental conditions. The specified
values of θ
Refer to JESD 51-7 and JESD 51-9 for detailed information
on the board construction. For additional information, see
the AN-617 Application Note, MicroCSP™ Wafer Level Chip
Scale Package.
Ψ
with units of °C/W. Ψ
a calculation using a 4-layer board. The JESD51-12, Guidelines
for Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as thermal
resistances. Ψ
multiple thermal paths rather than a single path as in thermal
resistance, θ
from the top of the package as well as radiation from the package,
factors that make Ψ
Maximum junction temperature (T
board temperature (T
Refer to JESD51-8 and JESD51-12 for more detailed information
about Ψ
THERMAL RESISTANCE
θ
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
ESD CAUTION
JA
JB
and Ψ
is the junction-to-board thermal characterization parameter
T
J
= T
JB
.
JB
JA
B
are specified for the worst-case conditions, that is, a
are based on a 4-layer, 4 inch × 3 inch circuit board.
JB
+ (P
JB
. Therefore, Ψ
measures the component power flowing through
D
× Ψ
JB
JB
more useful in real-world applications.
B
JB
) and power dissipation (P
)
of the package is based on modeling and
JB
thermal paths include convection
θ
170
260
JA
J
) is calculated from the
JA
can vary, depending on
Ψ
43
58
JB
JA
) of the package
D
) by
ADP150
Unit
°C/W
°C/W