ADL5315ACPZ-R7 Analog Devices Inc, ADL5315ACPZ-R7 Datasheet - Page 16

IC,Current Mirror,LLCC,8PIN,PLASTIC

ADL5315ACPZ-R7

Manufacturer Part Number
ADL5315ACPZ-R7
Description
IC,Current Mirror,LLCC,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADL5315ACPZ-R7

Design Resources
Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056)
Function
Current Mirror
Sensing Method
High-Side
Voltage - Input
2.7 ~ 8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ADL5315-EVAL - BOARD EVAL FOR ADL5315
Current - Output
-
Accuracy
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ADL5315ACPZ-R7TR
ADL5315
EVALUATION BOARD
Table 4. Evaluation Board (Rev. A) Configuration Options
Component
VPOS, GND
INPUT, L1, C4
R4, C3
SREF, VSET, SW1,
R1, R6, R7
IOUT, R5
R2
C1, C2, R3
Figure 36. Component Side Layout
I
Function
Supply and ground connections.
Input Interface: The evaluation board is configured to accept an input current at the
SMA connector labeled INPUT. Filtering of this current can be done using L1 and C4.
Input Compensation. Provides essential HF compensation at the INPT pin.
INPT Bias Voltage. The dc voltage applied to VSET determines the voltage at INPT,
V
Opening SW1 allows for VSET to be driven externally via the SMA connector.
Output/Mirror Current Interface: The output current at the SMA connector labeled IOUT is
equal to the value at INPT. R5 allows a resistor to be installed for applications where a
scaled voltage referenced to IPD is desirable instead of a current.
Current Limiting. An external resistor to VPOS sets the current limit at INPT from
1 mA to 16 mA. I
I
Supply Filtering/Decoupling.
PD
LIM
SET
= 3.7 mA.
= V
V
INPT
SET
. Connecting SREF to VSET sets the bias at INPT to be 1 V below V
C4
OPEN
LIM
390pF
L1
= 48 V/(R
C3
R4
4kΩ
LIM
S
Figure 35. Evaluation Board Schematic (Rev. A)
REF
+ 3 kΩ). The evaluation board is configured such that
R1
100Ω
SW1
1
2
3
4
Rev. 0 | Page 16 of 20
INPT
VSET
SREF
COMM
ADL5315
VPOS
RLIM
IOUT
NC
8
7
6
5
OPEN
R2
10kΩ
Figure 37. Component Side Silkscreen
R5
GND
POS
.
C1
0.01μF
R3
I
OUT
C2
0.01μF
V
POS
Default Conditions
Not applicable
L1 = 0 Ω (size 0805)
C4 = open (size 00603)
C3 = 390 pF (size 0805)
R4 = 4.02 kΩ (size 0402)
SW1 = closed
R1 = 100 Ω (size 0402)
R6 = R7 = 0 Ω (size 0402)
R5 = open (size 0603)
R2 = 10 kΩ (size 0402)
C1 = 0.01 μF (size 0402)
C2 = 0.1 μF (size 0603)
R3 = 0 Ω (size 0805)

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