ADG467BRSZ-REEL Analog Devices Inc, ADG467BRSZ-REEL Datasheet - Page 11

• Manufacturer Part Number: ADG467BRSZ-REEL
• Description: Octal Channel Protector I.C.
• Manufacturer: Analog Devices Inc
• Series: ADG467r

Specifications of ADG467BRSZ-REEL

• Voltage - Clamping: ±40V
• Technology: Mixed Technology
• Number Of Circuits: 8
• Applications: General Purpose
• Package / Case: 20-SSOP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Voltage - Working: -
• Lead Free Status / Rohs Status: Compliant

TRENCH ISOLATION
The MOS devices that make up the channel protector are
isolated from each other by an oxide layer (trench) (see Figure 26).
When the NMOS and PMOS devices are not electrically
isolated from each other, parasitic junctions between CMOS
transistors may cause latch-up. Latch-up is caused when P-N
junctions that are normally reverse biased become forward
biased, causing large currents to flow, which can be destructive.
R
E
N
C
H
T
V
P
N
Sx
+
–
P-CHANNEL
V
G
Figure 26. Trench Isolation
SUBSTRATE (BACKGATE)
BURIED OXIDE LAYER
V
Rev. B | Page 11 of 16
P
Dx
+
R
E
N
C
H
T
V
N
P
CMOS devices are normally isolated from each other by
junction isolation. In junction isolation, the N and P wells of the
CMOS transistors form a diode that is reverse biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward biased. A silicon-controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current that, in turn, leads to
latch-up. With trench isolation, this diode is removed; the result
is a latch-up-proof circuit.
Sx
–
+
N-CHANNEL
V
G
V
N
Dx
+
R
N
C
H
T
E
ADG467