ADC0801S040/DB NXP Semiconductors, ADC0801S040/DB Datasheet - Page 7

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ADC0801S040/DB

Manufacturer Part Number
ADC0801S040/DB
Description
ADC0801S040 Demo Board
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of ADC0801S040/DB

Design Resources
ADC0801S Demo Brd Files
Number Of Adc's
1
Number Of Bits
8
Sampling Rate (per Second)
40M
Data Interface
Parallel
Input Range
1.8 Vpp
Power (typ) @ Conditions
30mW @ 40MSPS
Operating Temperature
-20°C ~ 75°C
Utilized Ic / Part
ADC0801S040
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 6.
V
= 1.84 V; C
ADC0801S040_2
Product data sheet
Symbol
Digital outputs D7 to D0 and IR (Referenced to V
V
V
I
Clock input CLK; see
f
t
t
Analog signal processing (f
Linearity
INL
DNL
Bandwidth
B
Input set response; see
t
t
Harmonics; see
THD
Signal-to-Noise ratio; see
S/N
Effective bits; see
ENOB
Differential gain
G
OZ
clk(max)
w(clk)H
w(clk)L
s(LH)
s(HL)
DDA
OL
OH
dif
= V5 to V6 = 3.3 V; V
L
Characteristics
= 20 pF; T
Parameter
LOW-level output
voltage
HIGH-level output
voltage
OFF-state output current 0.4 V < V
maximum clock
frequency
HIGH clock pulse width
LOW clock pulse width
integral non-linearity
differential non-linearity
bandwidth
LOW to HIGH settling
time
HIGH to LOW settling
time
total harmonic distortion f
signal-to-noise ratio
effective number of bits
differential gain
[7]
Figure 9
Figure 9
amb
Figure 4
Figure 8
[6]
DDD
Figure 9
[6]
= 0 C to 70 C; typical values measured at T
…continued
clk
= V3 to V4 = 3.3 V; V
[1]
[5]
= 40 MHz)
[6]
Conditions
I
I
ramp input; see
ramp input; see
full-scale sine wave
75 % full-scale sine wave
50 % full-scale sine wave
small signal at mid scale;
V
full-scale square wave
full-scale square wave
without harmonics;
f
f
f
PAL modulated ramp
O
O
i
i
i
i
= 4.43 MHz
i
= 4.43 MHz
= 300 MHz
= 4.43 MHz
= 10 LSB at code 128
= 1 mA
= 1 mA
Rev. 02 — 18 August 2008
O
DDO
< V
SSD
= V20 to V11 = 3.3 V; V
DDO
)
Figure 6
Figure 7
[4]
amb
Min
0
V
40
9
9
-
-
-
-
-
-
-
-
-
-
-
-
-
20
DDO
= 25 C unless otherwise specified.
SSA
, V
0.5
SSD
Single 8 bits ADC, up to 40 MHz
Typ
-
-
-
-
-
-
10
13
20
350
3
3
47
7.8
7.3
1.5
and V
0.5
0.25
50
ADC0801S040
SSO
shorted together; V
Max
0.5
V
+20
-
-
-
5
5
-
-
-
-
-
0.75
0.5
DDO
© NXP B.V. 2008. All rights reserved.
Unit
V
V
MHz
ns
ns
LSB
LSB
MHz
MHz
MHz
MHz
ns
ns
dB
dB
bits
bits
%
A
i(a)(p-p)
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