AD9760-EBZ Analog Devices Inc, AD9760-EBZ Datasheet - Page 15

• Manufacturer Part Number: AD9760-EBZ
• Description: 10 BIT 125 MSPS+ TxDAC D/A Converter
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9760-EBZ

• Number Of Dac's: 1
• Number Of Bits: 10
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 125M
• Data Interface: Parallel
• Settling Time: 35ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9760
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note, the clock input could also be driven via a sine wave that is
centered around the digital threshold (i.e., DVDD/2), and
meets the min/max logic threshold. This will typically result in a
slight degradation in the phase noise, that becomes more notice-
able at higher sampling rates and output frequencies. Also, at
higher sampling rates, the 20% tolerance of the digital logic
threshold should be considered since it will affect the effective
clock duty cycle and subsequently cut into the required data
setup and hold times.
SLEEP MODE OPERATION
The AD9760 has a power-down function that turns off the out-
put current and reduces the supply current to less than 8.5 mA
over the specified supply range of 2.7 V to 5.5 V and tempera-
ture range. This mode can be activated by applying a logic level
“1” to the SLEEP pin. This digital input also contains an active
pull-down circuit that ensures that the AD9760 remains enabled
if this input is left disconnected. The SLEEP input with active
pull-down requires <40 µA of drive current.
The power-up and power-down characteristics of the AD9760
are dependent upon the value of the compensation capacitor
connected to COMP1. With a nominal value of 0.1 µF, the
AD9760 takes less than 5 µs to power down and approximately
3.25 ms to power back up. Note, the SLEEP MODE should not
be used when the external control amplifier is used as shown in
Figure 45.
POWER DISSIPATION
The power dissipation, P
several factors that include: (1) AVDD and DVDD, the power
supply voltages; (2) I
f
waveform. The power dissipation is directly proportional to the
analog supply current, I
I
ure 47 and is insensitive to f
REV. B
CLOCK
DVDD
. I
, the update rate; (4) and the reconstructed digital input
AVDD
30
25
20
15
10
5
0
2
is directly proportional to I
4
Figure 47. I
6
OUTFS
AVDD
D
8
, of the AD9760 is dependent on
, the full-scale current output; (3)
CLOCK
, and the digital supply current,
I
OUTFS
10
AVDD
.
– mA
12
vs. I
14
OUTFS
OUTFS
16
as shown in Fig-
18
20
–15–
Conversely, I
form, f
show I
(f
DVDD = 3 V, respectively. Note how I
than a factor of 2 when DVDD is reduced from 5 V to 3 V.
OUT
/f
DVDD
CLOCK
CLOCK
18
16
14
12
10
0.01
8
6
4
2
0
0.01
8
6
4
2
0
Figure 48. I
Figure 49. I
as a function of full-scale sine wave output ratios
) for various update rates with DVDD = 5 V and
, and digital supply DVDD. Figures 48 and 49
DVDD
is dependent on both the digital input wave-
DVDD
DVDD
RATIO (f
RATIO (f
vs. Ratio @ DVDD = 5 V
vs. Ratio @ DVDD = 3 V
0.1
0.1
OUT
OUT
/f
/f
CLK
CLK
DVDD
)
)
is reduced by more
125MSPS
100MSPS
50MSPS
25MSPS
5MSPS
AD9760
125MSPS
100MSPS
50MSPS
25MSPS
5MSPS
1
1