AD9522-2BCPZ Analog Devices Inc, AD9522-2BCPZ Datasheet - Page 81
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AD9522-2BCPZ
Manufacturer Part Number
AD9522-2BCPZ
Description
12- Channel Clock Generator With Int.VCO
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9522-2BCPZ-REEL7.pdf
(84 pages)
Specifications of AD9522-2BCPZ
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVDS
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.33GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
2.2GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
A recommended termination circuit for the LVDS outputs is
shown in Figure 71. If ac coupling is necessary, place decoupling
capacitors either before or after the 100 Ω termination resistor.
See the AN-586 Application Note at
information on LVDS.
CMOS CLOCK DISTRIBUTION
The output drivers of the AD9522 can be configured as CMOS
drivers. When selected as a CMOS driver, each output becomes
a pair of CMOS outputs, each of which can be individually
turned on or off and set as inverting or noninverting. These
outputs are 3.3 V CMOS compatible.
When single-ended CMOS clocking is used, some of the
following guidelines apply.
Point-to-point connections should be designed such that each
driver has only one receiver, if possible. Connecting outputs in
this manner allows for simple termination schemes and minimizes
ringing due to possible mismatched impedances on the output
trace. Series termination at the source is generally required to
provide transmission line matching and/or to reduce current
transients at the driver.
VS
LVDS
Figure 71. LVDS Output Termination
DIFFERENTIAL (COUPLES)
100Ω
www.analog.com
100Ω
VS
LVDS
for more
Rev. 0 | Page 81 of 84
The value of the resistor is dependent on the board design and
timing requirements (typically 10 Ω to 100 Ω is used). CMOS
outputs are also limited in terms of the capacitive load or trace
length that they can drive. Typically, trace lengths less than
3 inches are recommended to preserve signal rise/fall times and
signal integrity.
Termination at the far end of the PCB trace is a second option.
The CMOS outputs of the AD9522 do not supply enough current
to provide a full voltage swing with a low impedance, resistive far-
end termination, as shown in Figure 73. The far-end termination
network should match the PCB trace impedance and provide the
desired switching point. The reduced signal swing may still meet
receiver input requirements in some applications. This can be
useful when driving long trace lengths on less critical nets.
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9522 offers LVDS outputs that
are better suited for driving long traces where the inherent noise
immunity of differential signaling provides superior performance
for clocking converters.
Figure 73. CMOS Output with Far-End Termination
CMOS
Figure 72. Series Termination of CMOS Output
CMOS
10Ω
10Ω
MICROSTRIP
50Ω
(1.0 INCH)
60.4Ω
V
S
100Ω
100Ω
CMOS
CMOS
AD9522-2