AD9517-0ABCPZ Analog Devices Inc, AD9517-0ABCPZ Datasheet - Page 70
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AD9517-0ABCPZ
Manufacturer Part Number
AD9517-0ABCPZ
Description
12-Output Clock Generator With 2.8GHz VC
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9517-0ABCPZ-RL7.pdf
(80 pages)
Specifications of AD9517-0ABCPZ
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
1:12
Differential - Input:output
Yes/Yes
Frequency - Max
2.95GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.95GHz
Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
LFCSP EP
Pin Count
40
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9517-0ABCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9517-0
Reg.
Addr.
(Hex)
0x141
0x142
0x143
Bits
0
[7:5]
4
3
[2:1]
0
[7:5]
4
3
Name
OUT5 power-down
OUT6 output polarity
OUT6 CMOS B
OUT6 select LVDS/CMOS
OUT6 LVDS output current
OUT6 power-down
OUT7 output polarity
OUT7 CMOS B
OUT7 select LVDS/CMOS
Description
Power-down output (LVDS/CMOS).
0: power on.
1: power off (default).
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
0
0
1
1
0
0
1
1
In CMOS mode, turn on/off the CMOS B output. There is no effect in LVDS mode.
0: turn off the CMOS B output (default).
1: turn on the CMOS B output.
Select LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
Set output current level in LVDS mode. This has no effect in CMOS mode.
2
0
0
1
1
Power-down output (LVDS/CMOS).
0: power on.
1: power off (default).
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
0
0
1
1
0
0
1
1
In CMOS mode, turn on/off the CMOS B output. There is no effect in LVDS mode.
0: turn off the CMOS B output (default).
1: turn on the CMOS B output.
Select LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
6
0
1
0
1
0
1
0
1
1
0
1
0
1
6
0
1
0
1
0
1
0
1
Rev. B | Page 70 of 80
5
0
0
0
0
1
1
1
1
Current (mA)
1.75
3.5
5.25
7
5
0
0
0
0
1
1
1
1
OUT6A (CMOS)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
Noninverting
Noninverting
OUT7A (CMOS)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
Noninverting
Noninverting
OUT6B (CMOS)
Inverting
Noninverting
Inverting
Noninverting
Noninverting
Inverting
Noninverting
Inverting
Recommended Termination (Ω)
100
100 (default)
50
50
OUT7B (CMOS)
Inverting
Noninverting
Inverting
Noninverting
Noninverting
Inverting
Noninverting
Inverting
OUT6 (LVDS)
Noninverting
Noninverting (default)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting
OUT7 (LVDS)
Noninverting
Noninverting (default)
Noninverting
Noninverting
Inverting
Inverting
Inverting
Inverting