AD8153ACPZ-RL7 Analog Devices Inc, AD8153ACPZ-RL7 Datasheet - Page 17

• Manufacturer Part Number: AD8153ACPZ-RL7
• Description: IC,Telecom Switching Circuit,LLCC,32PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: XStream™r

Specifications of AD8153ACPZ-RL7

• Applications: 2:1 Multiplexer/1:2 De-Multiplexer
• Interface: I²C
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 32-LFCSP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD8153-EVALZ - BOARD EVALUATION FOR AD8153
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AD8153ACPZ-RL7TR

I
To read data from the AD8153 register set, a microcontroller, or
any other I
signals to the AD8153 slave device. The steps to be followed are
listed below, where the signals are controlled by the I
unless otherwise specified. A diagram of the procedure can be
seen in Figure 33.
1. Send a start condition (while holding the SCL line high, pull
2. Send the AD8153 part address (seven bits) whose upper
3. Send the write indicator bit (0).
4. Wait for the AD8153 to acknowledge the request.
5. Send the register address (eight bits) from which data is to
6. Wait for the AD8153 to acknowledge the request.
7. Send a repeated start condition (while holding the SCL line
8. Send the AD8153 part address (seven bits) whose upper
9. Send the read indicator bit (1).
10. Wait for the AD8153 to acknowledge the request.
11. The AD8153 then serially transfers the data (eight bits) held
2
C DATA READ
the SDA line low).
four bits are the static value b1001 and whose lower three
bits are controlled by the input pins I2C_ADDR[2:0]. This
transfer should be MSB first.
be read. This transfer should be MSB first. The register
address is kept in memory in the AD8153 until the part is
reset or the register address is written over with the same
procedure (Step 1 to Step 6).
high, pull the SDA line low).
four bits are the static value b1001 and whose lower three
bits are controlled by the input pins I2C_ADDR[1:0]. This
transfer should be MSB first.
in the register indicated by the address set in Step 5.
(GENERAL CASE)
2
C master, needs to send the appropriate control
(EXAMPLE)
SDA
SDA
SCL
START
1
FIXED PART
ADDR
2
ADDR
[2:0]
2
W
R
3
A
2
4
C master
REGISTER ADDR
Figure 33. I
Rev. 0 | Page 17 of 24
5
2
C Read Diagram
6
A
12. Acknowledge the data.
13. Send a stop condition (while holding the SCL line high, pull
14. Send a repeated start condition (while holding the SCL line
15. Send a repeated start condition (while holding the SCL line
16. Send a repeated start condition (while holding the SCL line
The AD8153 read process is shown in Figure 33. The SCL signal
is shown along with a general read operation and a specific
example. In the example, Data 0x49 is read from Address 0x6D
of an AD8153 part with a part address of 0x4B. The part address is
seven bits wide and is composed of the AD8153 static upper
four bits (b1001) and the pin programmable lower three bits
(I2C_ADDR[2:0]). In this example, the I2C_ADDR bits are set
to b011. In Figure 33, the corresponding step number is visible
in the circle under the waveform. The SCL line is driven by the
I
the data in the shaded polygons is driven by the AD8153,
whereas the data in the nonshaded polygons is driven by the I
master. The end phase case shown is that of 13a.
It is important to note that the SDA line only changes when the
SCL line is low, except for the case of sending a start, stop, or
repeated start condition, as in Step 1, Step 7, and Step 13. In
Figure 33, A is the same as ACK in Figure 32. Equally, Sr
represents a repeated start where the SDA line is brought high
before SCL is raised. SDA is then dropped while SCL is still high.
2
Sr
C master and never by the AD8153 slave. As for the SDA line,
7
the SDA line high) and release control of the bus.
high, pull the SDA line low) and continue with Step 2 of the
write procedure (see the I
a write.
high, pull the SDA line low) and continue with Step 2 of this
procedure to perform a read from another address.
high, pull the SDA line low) and continue with Step 8 of this
procedure to perform a read from the same address.
FIXED PART
ADDR
8
ADDR
[2:0]
8
W
R
9
A
10
2
C Data Write section) to perform
DATA
11
12
A
STOP
13a
AD8153
2
C