AD7707BR Analog Devices Inc, AD7707BR Datasheet - Page 40

• Manufacturer Part Number: AD7707BR
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc

Specifications of AD7707BR

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 16 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Features: 3V/5V, 1mW, 2?Channel, 16?Bit
• Package / Case: 20-SOIC
• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 500
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD7707
AD7707 TO 8XC51 INTERFACE
An interface circuit between the AD7707 and the 8XC51
microcontroller is shown in Figure 24. The diagram shows the
minimum number of interface connections with CS on the
AD7707 hard-wired low. In the case of the 8XC51 interface, the
minimum number of interconnects is just two. In this scheme,
the DRDY bit of the communications register is monitored to
determine when the data register is updated. The alternative
scheme, which increases the number of interface lines to three,
is to monitor the DRDY output line from the AD7707. The
monitoring of the DRDY line can be done in two ways. First,
DRDY can be connected to one of the 8XC51’s port bits (such as
P1.0), which is configured as an input. This port bit is then polled
to determine the status of DRDY . The second scheme is to use
an interrupt-driven system, in which case the DRDY output is
connected to the INT1 input of the 8XC51. For interfaces that
require control of the CS input on the AD7707, one of the port
bits of the 8XC51 (such as P1.1), which is configured as an output,
can be used to drive the CS input. The 8XC51 is configured in
its Mode 0 serial interface mode. Its serial interface contains a
single data line. As a result, the DATA OUT and DATA IN pins
of the AD7707 should be connected together with a 10 kΩ pull-
up resistor. The serial clock on the 8XC51 idles high between
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data transfers. The 8XC51 outputs the LSB first in a write
operation; however, the AD7707 expects the MSB first so the
data to be transmitted must be rearranged before being written
to the output serial register. Similarly, the AD7707 outputs the MSB
first during a read operation; however, the 8XC51 expects the
LSB first. Therefore, the data read into the serial buffer must be
rearranged before the correct data word from the AD7707 is
available in the accumulator.
8XC51
Figure 24. AD7707-to-8XC51 Interface
P3.0
P3.1
V
DD
V
DD
RESET
DIN
DOUT
SCLK
CS
AD7707